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Thin-film transistor having an inlaid thin-film channel region

  • US 5,426,315 A
  • Filed: 10/04/1993
  • Issued: 06/20/1995
  • Est. Priority Date: 10/04/1993
  • Status: Expired due to Fees
First Claim
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1. A thin-film transistor comprising:

  • a multi-layered insulating structure overlying a substrate and having a substantially vertical side, wherein the multi-layered insulating structure includes a channel spacing layer;

    a recess in the substantially vertical side, wherein the channel spacing layer is withdrawn from the vertical side and forms an inner wall of the recess;

    a thin-film channel region residing substantially within the recess;

    thin-film source and drain regions electrically connected to the thin-film channel region; and

    a gate electrode intermediate to the source and drain regions and separated from the thin-film channel region by a gate dielectric layer.

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