Fabrication process of wiring board

• US 5,426,850 A
• Filed: 11/30/1992
• Issued: 06/27/1995
• Est. Priority Date: 11/29/1991
• Status: Expired due to Term

• Current Assignee: Hitachi Chemical Company Limited (Resonac Holdings Corp.)
• Original Assignee: Hitachi Chemical Company Limited (Resonac Holdings Corp.)
• Inventors: Kaitou, Kouichi, Takahashi, Yoshihiro, Nakayama, Hajime, Fukutomi, Naoki, Tsubomatsu, Yoshiaki, Yoshidomi, Yasunobu
• Primary Examiner(s): VO, PETER DUNG BA
• Application Number:
  US07/983,342
• Time in Patent Office: 939 Days
• Field of Search: 29/848, 29/846, 29/847, 29/849, 156/150, 156/151, 156/152, 156/153, 156/630, 156/902, 156/654, 156/656, 156/901, 205/78, 205/125, 427/96-98
• US Class Current: 29/848
• CPC Class Codes: H05K 2201/0355 Metal foils
• CPC Class Codes: H05K 2201/0361 Etched tri-metal structure, i.e. metal layers or metal patterns on both sides of a different central metal layer which is later at least partly etched
• CPC Class Codes: H05K 2201/09509 Blind vias, i.e. vias having one side closed
• CPC Class Codes: H05K 2201/09563 Metal filled via plated through-hole filled with insulating material H05K2201/0959
• CPC Class Codes: H05K 2201/09781 Dummy conductors, i.e. not used for normal transport of current; Dummy electrodes of components
• CPC Class Codes: H05K 2203/0152 Temporary metallic carrier, e.g. for transferring material affixing a prefabricated conductor pattern formed by electroplating or electroforming on a metallic carrier H05K3/205
• CPC Class Codes: H05K 2203/025 Abrading, e.g. grinding or sand blasting deburring, rounding, bevelling or smoothing conductor edges H05K2203/0346
• CPC Class Codes: H05K 2203/0376 Etching temporary metallic carrier substrate
• CPC Class Codes: H05K 2203/0384 Etch stop layer, i.e. a buried barrier layer for preventing etching of layers under the etch stop layer
• CPC Class Codes: H05K 2203/0726 Electroforming, i.e. electroplating on a metallic carrier thereby forming a self-supporting structure
• CPC Class Codes: H05K 2203/0733 Method for plating stud vias, i.e. massive vias formed by plating the bottom of a hole without plating on the walls
• CPC Class Codes: H05K 2203/1476 Same or similar kind of process performed in phases, e.g. coarse patterning followed by fine patterning
• CPC Class Codes: H05K 3/04 the conductive material being removed mechanically, e.g. by punching
• CPC Class Codes: H05K 3/205 using a pattern electroplated or electroformed on a metallic carrier
• CPC Class Codes: H05K 3/428 initial plating of through-holes in substrates having a metal pattern
• CPC Class Codes: H05K 3/4647 by applying an insulating layer around previously made via studs
• CPC Class Codes: H05K 3/4652 Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern H05K3/4647 takes precedence
• CPC Class Codes: H05K 3/4658 characterized by laminating a prefabricated metal foil pattern, e.g. by transfer
• CPC Class Codes: Y10S 29/016 Method or apparatus with etching
• CPC Class Codes: Y10T 29/49156 with selective destruction of conductive paths
• CPC Class Codes: Y10T 29/49158 : with molding of insulated base

Abstract

A wiring board is fabricated through the following steps:

(A) forming, on one side of an elongated carrier metal foil made of a first metal, a thin layer with a second metal whose etching conditions are different from those of the first metal;

(B) forming, on a surface of the thin layer, a desired wiring pattern with a third metal whose etching conditions are different from those of the second metal;

(C) superposing the carrier metal foil on an insulating substrate with the side of the wiring pattern being positioned inside, whereby the wiring pattern is embedded in the insulating substrate; and

(D) etching off the carrier metal foil and the thin layer at desired parts thereof.

Claims

1. A process for the fabrication of a wiring board, which comprises the following steps:

(A) forming, on one side of a continuous carrier metal foil made of a first metal, a thin layer of a second metal whose etching conditions are different from those of the first metal;

(B) forming, on a surface of the thin layer of the second metal, a desired wiring pattern of a third metal whose etching conditions are different from those of the second metal and, concurrently with the formation of the desired wiring pattern, forming a location pattern, which is to be used as a reference for etching off desired parts of the carrier metal foil of the first metal in a subsequent step (D), on the opposite side of the carrier metal foil of the side on which the thin layer of the second metal is formed;

(C) superposing and pressing the carrier metal foil, which carries the desired wiring pattern formed thereon, on and against an insulating substrate with said wiring pattern facing said insulating substrate to embed the wiring pattern in said insulating substrate; and

(D) etching off the carrier metal foil of the first metal at the desired parts thereof and the thin layer of the second metal at predetermined parts thereof.

2. A process for the fabrication of a wiring board, which comprises the following steps:

(A) forming on one side of a continuous carrier metal foil made of a first metal, a thin layer of a second metal whose etching conditions are different from those of the first metal;

(B) forming, on the surface of the thin layer of the second metal, a desired wiring pattern of a third metal whose etching conditions are different from those of the second metal, wherein the resulting wiring-pattern-bearing metal foil has flexibility;

(C) superposing and pressing the carrier metal foil, which carries the desired wiring pattern formed thereon, on and against an insulating substrate with said wiring pattern facing said insulating substrate, to embed the wiring pattern in the insulating substrate; and

(D) etching off the carrier metal foil of the first metal at the desired parts thereof to form a second wiring pattern.

3. A process for the fabrication of a wiring board, which comprises the following steps:

(A) forming on one side of a continuous carrier metal foil made of a first metal, a thin layer of a second metal whose etching conditions are different from those of the first metal;

(B) forming, on a surface of the thin layer of the second metal, a desired wiring pattern of a third metal whose etching conditions are different from those of the second metal, wherein the resulting wiring-pattern-bearing metal foil has flexibility;

(C) superposing and pressing the carrier metal foil, which carries the desired wiring pattern formed thereon, on and against an insulating substrate with said wiring pattern facing said insulating substrate, to embed the wiring pattern in the insulating substrate; and

(D) etching off the carrier metal foil of the first metal at desired parts thereof.