Semiconductor wafer processing with across-wafer critical dimension monitoring using optical endpoint detection

• US 5,427,878 A
• Filed: 05/16/1994
• Issued: 06/27/1995
• Est. Priority Date: 06/26/1991
• Status: Expired due to Term

• Current Assignee: Hewlett-Packard Development Company, L.P. (HP Inc.)
• Original Assignee: Digital Equipment Corporation (HP Inc.)
• Inventors: Corliss, Daniel A.
• Primary Examiner(s): McCamish, Marion E.
• Assistant Examiner(s): Duda, Kathleen
• Application Number:
  US08/243,558
• Time in Patent Office: 407 Days
• Field of Search: 430/30, 430/311, 430/325, 156/626, 156/643, 204/192.13, 204/192.33, 204/298.32, 250/573, 356/345, 356/357, 356/381, 356/382, 356/436, 356/442, 356/443
• US Class Current: 430/30
• CPC Class Codes: G01B 11/0683 measurement during deposition or removal of the layer

Abstract

A method for across-wafer critical dimension uniformity performance monitoring in the manufacture of semiconductor devices employs a number of optical endpoint detectors at sites at the wafer face which are spaced across the wafer face. Each optical endpoint detector is able to directly measure the end point of the process step at its site. One of these optical endpoint detectors is used to control the process, and when the endpoint has been reached for this site the process completion time is predicted and this completion time is used to control the processing equipment. For example, if the process step being monitored is the development of photoresist, then the developing operation is ended based upon this calculated completion time derived from the detected endpoint for the control site. The other sites are used to monitor across-wafer performance. The output of each of these other optical detectors is used to determine the endpoint for each monitor site, and these endpoints are compared with the control endpoint to determine across-wafer critical dimension performance and conformance to specification. The wafers can thus be flagged if out-of-limit, and need not be processed through subsequent steps.

Claims

1. A method of determining critical dimension uniformity in the processing of a semiconductor wafer in a process having a first process stage and having subsequent second processing stages, comprising the steps of:

a) at said first process stage, detecting the progress of removal of a coating on a face of a wafer by each of a plurality of separate optical endpoint detectors of like construction positioned at different sites spaced across said face, one of said detectors being a control detector and at least one of said detectors being a monitor detector, the detectors having separate light sources and separate sensors;

b) determining a control process completion time for said first process stage from an output of said control detector, and terminating said first process stage by ceasing removal of said coating at said completion time;

c) determining a monitor process completion time for said first process stage from an output of each said monitor detector;

d) comparing said monitor process completion time with said control process completion time to determine differences in said process completion times revealed by said step of comparing.

2. A method according to claim 1 wherein there are at least two of said monitor detectors, and a monitor process completion time is determined for each of said monitor detectors.

3. A method according to claim 1 wherein said coating is photoresist and said removal is developing of said photoresist.

4. A method according to claim 3 wherein said step of detecting includes directing a source of monochromatic light at an area of photoresist being developed, and observing interference patterns in light reflected from the surface of the photoresist and from the face of the wafer beneath the photoresist.

5. A method of manufacturing a semiconductor device in a process having a first process stage and having subsequent second processing stages, comprising the steps of:

a) in said first process stage, applying a coating of photoresist to a face of a semiconductor substrate, and exposing said face to radiation through a mask to define a pattern;

b) applying a developer to said face to develop said photoresist;

c) detecting the progress of developing said photoresist by each of a plurality of separate optical endpoint detectors of like construction positioned at different sites spaced across said face, one of said detectors being a control detector and at least one of said detectors being a monitor detector, the detectors having separate light sources and separate sensors;

d) determining a control process completion time for said first process stage from an output of said control detector, and terminating said first process stage by ceasing said step of applying developer, based upon said completion time;

e) determining a monitor process completion time for said first process stage from an output of each said monitor detector;

f) comparing said monitor process completion time with said control process completion time to determine differences in said process completion times revealed by said step of comparing.

6. A method according to claim 5 wherein there are at least two of said monitor detectors, and a monitor process completion time is determined for each of said monitor detectors.

7. A method according to claim 5 wherein said step of detecting includes directing a beam of monochromatic light at an area of photoresist being developed, and observing interference patterns in light reflected from the surface of the photoresist and from the face of the wafer beneath the photoresist.