Variable length code decoder utilizing a predetermined prioritized decoding arrangement

• US 5,428,356 A
• Filed: 09/21/1993
• Issued: 06/27/1995
• Est. Priority Date: 09/24/1992
• Status: Expired due to Term

• Current Assignee: Sony Corporation (Sony Group Corp.)
• Original Assignee: Sony Corporation (Sony Group Corp.)
• Inventors: Ozaki, Nozomu
• Primary Examiner(s): Hoff, Marc S.
• Application Number:
  US08/124,504
• Time in Patent Office: 644 Days
• Field of Search: 341/65, 341/67
• US Class Current: 341/67
• CPC Class Codes: G06T 9/005 Statistical coding, e.g. Huffman, run length coding
• CPC Class Codes: H03M 7/425 for the decoding process only

Abstract

In a Huffman code decoder for decoding a Huffman code into data, a high speed variable length code decoder including a first decoder circuit for decoding a leading Huffman code of a Huffman code string and a second decoder circuit for decoding a consecutive string of two Huffman codes from the leading portion of the Huffman code string in which two data can be decoded by one decoder operation.

Claims

1. A decoder apparatus for decoding a variable length encoded signal, said apparatus comprising:

a data register for storing therein a first predetermined number of data bits of said variable length encoded signal;

a barrel shifter receiving the stored data bits from said data register and supplying therefrom a second predetermined number of data bits;

a first decoder receiving the data bits from said barrel shifter and decoding at least a portion of such received data bits so as to produce a single decoded value;

a second decoder receiving the data bits from said barrel shifter and decoding at least a portion of such received data bits so as to produce at least two decoded values;

a selector circuit for selectively outputting one of said single decoded value from said first decoder and said at least two decoded values from said second decoder;

a shift controller for controlling a shifting operation of said barrel shifter such that the data bits supplied therefrom are shifted by a predetermined amount upon receiving an output signal from said first or second decoder; and

a controller for controlling said selector circuit such that said single decoded value from said first decoder or said at least two decoded values from said second decoder are selectively output to a data output terminal in response to a hit signal supplied thereto from said first or second decoder and in accordance with a priority assigned to each said at least two decoded values so that said selector circuit outputs said at least two decoded values from said second decoder instead of said single decoded value from said first decoder when said second decoder produces said at least two decoded values and said selector circuit outputs each said single decoded value from said first decoder when said second decoder fails to produce said at least two decoded values.

2. The decoder apparatus according to claim 1, wherein said first decoder produces the single decoded value by decoding the data bits from said barrel shifter starting from a leading data bit thereof.

3. The decoder apparatus according to claim 1, wherein said second decoder produces said at least two decoded values by decoding the data bits from said barrel shifter starting from a leading data bit thereof.

4. The decoder apparatus according to claim 1, wherein said variable length encoded signal is encoded by utilizing a Huffman code.

5. The decoder apparatus according to claim 4, wherein said second predetermined number of data bits of said Huffman code is supplied from said barrel shifter to said first and second decoders in parallel.

6. The decoder apparatus according to claim 1, wherein said variable length encoded signal represents image data.

7. A decoder apparatus for decoding an encoded signal, said decoder apparatus comprising:

means for receiving said encoded signal and for supplying therefrom a predetermined number of data bits of said encoded signal;

first decoding means for decoding at least a portion of said predetermined number of data bits so as to produce a single decoded value;

second decoding means for decoding at least a portion of said predetermined number of data bits so as to produce at least two decoded values; and

means for selectively supplying therefrom one of said single decoded value from said first decoding means and said at least two decoded values from said second decoding means so as to produce a decoded signal in accordance with an assigned priority, said priority being assigned to each said at least two decoded values so that said means for selectively supplying supplies therefrom said at least two decoded values from said second decoding means instead of said single decoded value from said first decoding means when said second decoding means produces said at least two decoded values and said means for selectively supplying supplies therefrom said single decoded value from said first decoding means when said second decoding means fails to produce said at least two decoded values.

8. A decoder apparatus for decoding an encoded signal, said decoder apparatus comprising:

means for receiving said encoded signal and for supplying therefrom a predetermined number of data bits of said encoded signal representing at least one data value from among a predetermined number of data values;

first decoding means for decoding at least a portion of said predetermined number of data bits so as to produce a single decoded data value;

second decoding means for decoding at least a portion of said predetermined number of data bits so as to produce at least two decoded data values, in which the data bits corresponding to each data value of said at least two decoded data values occur more frequently than the data bits corresponding to the other data values of said predetermined number of data values; and

means for selectively supplying therefrom one of said single decoded data value from said first decoding means and said at least two decoded data values from said second decoding means so as to produce a decoded signal.

9. A decoder apparatus for decoding a signal encoded with a variable length code, said decoder apparatus comprising:

data register means for receiving the encoded signal and for storing the received encoded signal therein;

barrel shifter means for receiving the stored encoded signal from said data register means and for supplying therefrom a group of data bits of said stored encoded signal, said group having a predetermined number of data bits which represent at least one data value from among a plurality of data values;

first decoding means for decoding at least a portion of said group of data bits so as to produce a single decoded data value, said first decoding means producing a first hit signal and a first code length signal representative of the number of data bits included in the respective decoded portion of said group of data bits upon producing said single decoded data value;

second decoding means for decoding at least a portion of said group of data bits so as to produce at least two decoded data values, said second decoding means producing a second hit signal ad a second code length signal representative of the number of data bits included in the respective decoded portion of said group of data bits upon producing said at least two decoded data values;

selector means for selectively supplying therefrom one of said single decoded data value from said first decoding means and said at least two decoded data values from said second decoding means so as to produce a decoded signal in accordance with an assigned priority; and

control means, responsive to said first and second hit signals and said first and second code length signals, for controlling mans selector means in accordance with said assigned priority such that said at least two decoded data values from said second decoding means are supplied therefrom instead of said signal decoded data value from said first decoding means when said second decoding means produces said at least two decoded data values and such that said single decoded data value from said first decoding means is supplied therefrom when said second decoding means fails to produce said at least two decoded data values and for controlling said barrel shifter means so as to cause another group of data bits to be supplied therefrom.

10. A decoder apparatus according to claim 9, wherein the data bits corresponding to each data value of the at least two decoded data values produced by said second decoding means occur more frequently than the data bits corresponding to the other data values of said plurality of data values.