Subscriber line interface circuit with reduced on-chip power dissipation

• US 5,428,682 A
• Filed: 03/12/1993
• Issued: 06/27/1995
• Est. Priority Date: 03/12/1993
• Status: Expired due to Term

• Current Assignee: Legerity Incorporated (Microsemi Semiconductor Corp.)
• Original Assignee: Advanced Micro Devices, Inc.
• Inventors: Apfel, Russel J.
• Primary Examiner(s): Dwyer, James L.
• Assistant Examiner(s): SAINT SURIN, JACQUES M
• Application Number:
  US08/031,785
• Time in Patent Office: 837 Days
• Field of Search: 379/399, 379/413, 379/398
• US Class Current: 379/413
• CPC Class Codes: H04M 19/005 Feeding arrangements without the use of line transformers
• CPC Class Codes: Y02D 30/70 in wireless communication networks

Abstract

A subscriber line interface circuit is provided that includes an output stage having a pair of differential transconductance amplifiers to drive the tip and ring lines of a telephone exchange. The output stage includes circuitry that advantageously reduces the power dissipated within the integrated circuit when the subscriber loop impedance is relatively low. As a result, heat generation within the integrated circuit is reduced. Circuit reliability may therefore be enhanced and fabrication and packaging costs may be reduced. In one embodiment, an off-chip resistor is coupled from an output line of the ring line amplifier to the negative voltage rail. When the loop impedance is low, a relatively large voltage drop is established across the resistor which therefore absorbs a greater percentage of the loop current. Since the resistor is provided off-chip and diverts current that would otherwise flow through the ring-line amplifier, the overall heat dissipated within the integrated circuit is reduced.

Claims

1. A subscriber line interface circuit comprising:

an input circuit for receiving signals from a telephone exchange;

a first output driver circuit coupled to said input circuit for driving a tip line of a subscriber loop;

a second output driver circuit coupled to said input circuit for driving a ring line of said subscriber loop; and

a first resistor coupled between said second output driver circuit and a first voltage terminal so that direct current flow in said subscriber loop is independent of direct current flow through said first resistor and power dissipation is moderated in said second output driver circuit when an off-hook condition exists between said tip line and said ring line.

2. The subscriber line interface circuit as recited in claim 1 wherein said first output driver circuit comprises a first operational amplifier and wherein said second output driver circuit comprises a second operational amplifier.

3. The subscriber line interface circuit as recited in claim 2 wherein said first and second output drivers are configured as differential transconductance amplifiers.

4. The subscriber line interface circuit as recited in claim 1 wherein said input circuit and said first and second output driver circuits are fabricated on an integrated circuit and wherein said first resistor is provided off the integrated circuit.

5. The subscriber line interface circuit as recited in claim 1 further comprising a second resistor coupled between said first output driver circuit and a second voltage terminal so that direct current flow in said subscriber loop is independent of direct current flow through said second resistor and power dissipation is moderated in said first output driver circuit.

6. The subscriber line interface circuit as recited in claim 1 further comprising a switch coupled in series between said first resistor and said second output driver circuit.

7. The subscriber line interface circuit as recited in claim 6 wherein said switch is a transistor switch.

21. The subscriber line interface circuit as recited in claim 5 further comprising:

a third voltage terminal coupled to said first output driver circuit; and

a fourth voltage terminal coupled to said second output driver, wherein said second voltage terminal and said fourth voltage terminal are at ground potential, and said first voltage terminal and said third voltage terminal are at a voltage potential of minus 50 volts.

22. The subscriber line interface circuit as recited in claim 1 wherein said first resistor is further coupled between said first output driver circuit and said first voltage terminal.

23. The subscriber line interface circuit as recited in claim 22 further comprising a switch coupled in series between said first resistor and said first output driver circuit.

24. The subscriber line interface circuit as recited in claim 5 further comprising a switch coupled in series between said second resistor and said first output driver circuit.

25. The subscriber line interface circuit as recited in claim 5 wherein said second resistor is further coupled between said second output driver and said second voltage terminal.

26. The subscriber line interface circuit as recited in claim 25 further comprising a switch coupled in series between said second resistor and said second output driver.

39. The subscriber line interface circuit as recited in claim 23 further comprising:

a second switch coupled in series between said first resistor and said second output driver circuit;

a second resistor coupled between said first output driver circuit and a second voltage terminal so that direct current flow in said subscriber loop is independent of direct current flow through said second resistor and power dissipation is moderated in said first output driver circuit, and further coupled between said second output driver and said second voltage terminal;

a third switch coupled in series between said second resistor and said first output driver circuit; and

a fourth switch coupled in series between said second resistor and said second output driver.

8. A subscriber line interface circuit comprising:

an input circuit for receiving signals from a telephone exchange;

a first output driver circuit coupled to said input circuit for driving a tip line of a subscriber loop;

a second output driver circuit coupled to said input circuit for driving a ring line of said subscriber loop; and

a first resistor coupled between said first output driver circuit and a first voltage terminal so that direct current flow in said subscriber loop is independent of direct current flow through said first resistor and power dissipation is moderated in said first output driver circuit when an off-hook condition exists between said tip line and said ring line.

9. The subscriber line interface circuit as recited in claim 8 wherein said first output driver circuit comprises a first operational amplifier and wherein said second output driver circuit comprises a second operational amplifier.

10. The subscriber line interface circuit as recited in claim 9 wherein said first and second output drivers are configured as differential transconductance amplifiers.

11. The subscriber line interface circuit as recited in claim 8 wherein said input circuit and said first and second output driver circuits are fabricated on an integrated circuit and wherein said first resistor is provided off the integrated circuit.

12. The subscriber line interface circuit as recited in claim 8 further comprising a second resistor coupled between said second output driver circuit and a second voltage terminal so that direct current flow in said subscriber loop is independent of direct current flow through said first resistor and power dissipation is moderated in said first output driver circuit.

13. The subscriber line interface circuit as recited in claim 8 further comprising a switch coupled in series between said first resistor and said first output driver circuit.

14. The subscriber line interface circuit as recited in claim 13 wherein said switch is a transistor switch.

27. The subscriber line interface circuit as recited in claim 8 further comprising:

a third voltage terminal coupled to said first output driver circuit;

a fourth voltage terminal coupled to said second output driver, wherein said first voltage terminal and said second voltage terminal are at ground potential, and said second voltage terminal and said fourth voltage terminal are at a voltage potential of minus 50 volts.

15. A subscriber line interface circuit comprising:

an input circuit having an input for receiving signals from a telephone exchange;

a first resistor having a first terminal coupled to a tip line terminal, and further having a second terminal;

a first operational amplifier having an input coupled to an output of said input circuit and an output coupled to the second terminal of said first resistor;

a first feedback circuit coupled to said first operational amplifier, said first feedback circuit configuring said first operational amplifier to provide a regulated DC current through said first resistor when the subscriber line is in an off-hook condition;

a second resistor having a first terminal coupled to a ring line terminal, and further having a second terminal;

a second operational amplifier having an input coupled to an output of said input circuit and an output coupled to the second terminal of said second resistor;

a second feedback circle coupled to said second operational amplifier, said second feedback circuit configuring said second operational amplifier to provide the regulated DC current through said second resistor when the subscriber line is in an off-hook condition; and

a third resistor having a first terminal coupled between the output of said second operational amplifier and the second terminal of said second resistor, and a second terminal coupled to a first voltage terminal.

16. The subscriber line interface circuit as recited in claim 15 wherein said input circuit and said first and second operational amplifiers are fabricated on an integrated circuit and wherein said first resistor is provided off the integrated circuit.

17. The subscriber line interface circuit as recited in claim 15 further comprising a fourth resistor having a first terminal coupled between the output of said first operational amplifier and the second terminal of said first resistor, and a second terminal coupled to a second voltage terminal.

18. The subscriber line interface circuit as recited in claim 15 further comprising a switch coupled in series between said third resistor and the output of said second operational amplifier.

19. The subscriber line interface circuit as recited in claim 18 wherein said switch is a transistor switch.

20. The subscriber line interface circuit as recited in claim 17 further comprising a switch coupled in series between said fourth resistor and the output of said first operational amplifier.

28. A subscriber line interface circuit comprising:

an input circuit receiving signals from a telephone exchange;

a first output driver circuit coupled to said input circuit and having an output driving a tip line signal onto a subscriber loop;

a second output driver circuit coupled to said input circuit and having an output driving a ring line signal with a substantially constant DC current component onto the subscriber loop, said second output driver circuit including a first current sensing element having a first terminal coupled to the subscriber loop and a second terminal coupled to the output of said second output driver to convey the ring line signal thereto; and

a first resistive element external to said second output driver circuit and having a first terminal coupled between the second terminal of said current sensing element and the output of said second output driver, and a second terminal coupled to a first voltage terminal so that power dissipation in said second output driver circuit is moderated.

29. The subscriber line interface circuit as recited in claim 28 wherein said first output driver circuit comprises a first operational amplifier and wherein said second output driver circuit comprises a second operational amplifier.

30. The subscriber line interface circuit as recited in claim 29 wherein said first and second output drivers are configured as differential transconductance amplifiers.

31. The subscriber line interface circuit as recited in claim 28 wherein:

said tip line signal includes a substantially constant DC current component;

said first output driver circuit includes a second current sensing element having a first terminal coupled to the subscriber loop and a second terminal coupled to the output of said first output driver to convey the tip line signal thereto; and

said subscriber line interface circuit further comprises a second resistive element external to said first output driver circuit and having a first terminal coupled between the second terminal of said second current sensing element and the output of said first output driver, and a second terminal coupled to a second voltage terminal so that power dissipation in said first output driver circuit is moderated.

32. The subscriber line interface circuit as recited in claim 31 further comprising a switch coupled in series between said first terminal of said second resistor and said second terminal of said second current sensing element.

33. The subscriber line interface circuit as recited in claim 31 wherein said first terminal of said second resistor is further coupled to said second terminal of said first current sensing element.

34. The subscriber line interface circuit as recited in claim 33 further comprising a switch coupled in series between said first terminal of said second resistor and said second terminal of said first current sensing element.

35. The subscriber line interface circuit as recited in claim 28 further comprising a switch coupled in series between said first terminal of said first resistor and said second terminal of said first current sensing element.

36. The subscriber line interface circuit as recited in claim 28 wherein said first terminal of said first resistor is further coupled to said second terminal of said second current sensing element.

37. The subscriber line interface circuit as recited in claim 36 further comprising a switch coupled in series between said first terminal of said first resistor and said second terminal of said second current sensing element.

38. The subscriber line interface circuit as recited in claim 28 further comprising:

a third voltage terminal coupled to said first output driver circuit;

a fourth voltage terminal coupled to said second output driver, wherein said second voltage terminal and said fourth voltage terminal are at ground potential, and said first voltage terminal and said third voltage terminal are at a voltage potential of minus 50 volts.

40. A subscriber line interface integrated circuit having a tip node and a ring node, the subscriber line interface circuit comprising:

a first transconductance amplifier having an output coupled to the tip node, an input, and a feedback path coupled across the output and input;

a second transconductance amplifier having an output coupled to the ring node, an input, and a feedback path coupled across the output and input;

an off-chip resistor node in the feedback path of the second transconductance amplifier; and

a system interface having a plurality of I/O nodes, a first node coupled to the input of the first transconductance amplifier, and a second node coupled to the input of the second transconductance amplifier.

41. The subscriber line interface circuit of claim 40 further comprising:

a first reference voltage node; and

a power sharing resistor coupled between the first reference voltage node and the off chip resistor node.

42. A subscriber line interface circuit coupled to a first voltage reference terminal and a second voltage reference terminal and having a tip line terminal and a ring line terminal for coupling the subscriber line interface circuit to a subscriber loop, the subscriber loop having a subscriber loop impedance defined in part by a tip line, a ring line, and a telephone connected between the tip line and ring line, the subscriber loop interface circuit comprising:

a first amplifier circuit having an output coupled to the tip line terminal and an input;

a second amplifier circuit having an output coupled to the ring line terminal and an input;

an input and monitor circuit having an input coupled to the system interface for receiving signals, a first node coupled to the tip line terminal and a second node coupled to the ring line terminal to detect a telephone off-hook condition, the input and monitor circuit further having a third node coupled to the first amplifier circuit input and a fourth node coupled to the second amplifier circuit input, wherein when the input and monitor circuit is coupled to the subscriber loop the input and monitor circuit responds to the telephone off-hook condition and the subscriber loop impedance and controls the first and second amplifier circuits to establish an operating voltage across the subscriber loop and a loop current in the subscriber loop;

a first resistor coupled between the first voltage reference terminal and the first amplifier circuit output; and

a second resistor coupled between the second voltage reference terminal and the second amplifier circuit output, wherein the first amplifier circuit delivers a first portion of the loop current to the subscriber loop and the first resistor delivers a second portion of the loop current, the second amplifier circuit sinks a third portion of the loop current and the second resistor sinks a fourth portion of the loop current.