High voltage transistor having edge termination utilizing trench technology

• US 5,430,324 A
• Filed: 07/23/1992
• Issued: 07/04/1995
• Est. Priority Date: 07/23/1992
• Status: Expired due to Term

• Current Assignee: Siliconix Incorporated (Vishay Intertechnology Incorporated)
• Original Assignee: Siliconix Incorporated (Vishay Intertechnology Incorporated)
• Inventors: Bencuya, Izak
• Primary Examiner(s): Loke, Steven Ho Yin
• Application Number:
  US07/918,996
• Time in Patent Office: 1,076 Days
• Field of Search: 257/330, 257/331, 257/339, 257/341, 257/409, 257/490, 257/495, 257/329, 257/491
• US Class Current: 257/495
• CPC Class Codes: H01L 29/0619 with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
• CPC Class Codes: H01L 29/404 Multiple field plate structures
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/66348 with a recessed gate
• CPC Class Codes: H01L 29/7811 with an edge termination structure guard regions per se H01L29/0619; field plates per se H01L29/402
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236

Abstract

For a vertical DMOS power transistor or a high voltage bipolar transistor, an edge termination at the perimeter of the die surrounding the active transistor cells includes multiple spaced apart field rings. A trench is located between each adjacent pair of field rings and is insulated either by oxide formed on the sidewalls thereof or by an oxide filling. The insulated trenches allow the field rings to be very closely spaced together. Advantageously the trenches may be formed in the same process steps as are the trenched gate electrodes of the active portion of the transistor. This structure eliminates the necessity for fabricating thick field oxide underlying a conventional field plate termination, and hence allows fabrication of a transistor without the need for a field plate termination, and in which the multiple field rings are suitable for a transistor device having a breakdown voltage in the range of 20 to 150 volts. The trenches advantageously eliminate the process sensitivity of using multi field ring terminations with low resistivity semiconductor material.

Claims

1. A high voltage transistor structure including at least one transistor having at least two doped regions formed in a substrate, and a gate electrode, and comprising:

at least a first field ring and a second field ring of similar width and depth as the first field ring and spaced apart from the first field ring, both field rings being formed in the substrate and both laterally surrounding the transistor;

a first insulated trench formed in the substrate in the space between the first and second field rings, the first insulated trench laterally surrounding the transistor;

a deep body region formed in the substrate; and

a gate electrode formed in a gate trench in the substrate;

wherein a depth and doping level of the first and second field rings are the same as that of the deep body region, and the depth and width of the first insulated trench are the same as that of the gate trench.

2. The device of claim 1, wherein an insulating layer is formed on the sidewalls of the first insulated trench and the first insulated trench is filled with a conductive material.

3. The device of claim 1, wherein the first and second field rings extend into the substrate to a depth greater than that of the first insulated trench.

4. The device of claim 1, further comprising a conductive guard ring formed overlying the substrate and laterally surrounding both field rings.

5. The device of claim 1, wherein both field rings are doped regions.

6. The device of claim 1, further comprising:

a third field ring formed in the substrate and laterally surrounding the first and second field rings; and

a second insulated trench formed in the substrate between the third field ring and the second field ring.

7. The device of claim 6, wherein the first insulated trench is at least partially filled with a conductive material and an insulating layer is formed on the sidewalls of the first insulated trench.

8. The device of claim 1, wherein the first insulated trench has sidewalls vertical with respect to a principal surface of the substrate, and respectively adjacent to vertical sides of the first and second field rings.

9. The device of claim 1, wherein the first insulated trench has a width of 1 to 2 microns.

10. The device of claim 1, wherein the device has a breakdown voltage in the range of 20 to 150 volts.

11. A high voltage transistor structure including at least one transistor having at least two doped regions formed in a substrate, and a gate electrode, and comprising:

at least a first field ring and a second field ring spaced apart from the first field ring, both field rings being formed in the substrate and both laterally surrounding the transistor; and

an insulated trench formed in the substrate in the space between the first and second field rings, the insulated trench laterally surrounding the transistor;

wherein the transistor is a field effect transistor and also includes a deep body region, and said gate electrode of the transistor is formed in a gate trench, wherein the depth and doping level of the field rings are the same as that of the deep body region, and the depth and width of the insulated trench are the same as that of the gate trench.