Semiconductor device for mounting on a printed wiring board

• US 5,430,326 A
• Filed: 05/05/1994
• Issued: 07/04/1995
• Est. Priority Date: 06/26/1992
• Status: Expired due to Term

• Current Assignee: Fuji Electric Company Limited (Fuji Electric Systems Company Limited)
• Original Assignee: Fuji Electric Company Limited (Fuji Electric Systems Company Limited)
• Inventors: Miyashita, Shuji
• Primary Examiner(s): Mintel, William
• Assistant Examiner(s): BROWN, PETER T
• Application Number:
  US08/238,673
• Time in Patent Office: 425 Days
• Field of Search: 257/573, 257/584, 257/587, 257/678, 257/691, 257/698, 257/700, 257/723, 257/724, 257/690, 361/728, 361/735, 361/744, 361/760, 361/784, 361/785, 361/792, 439/44, 439/45, 439/74, 439/75
• US Class Current: 257/690
• CPC Class Codes: H01L 25/115 the devices being arranged next to each other
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H02M 7/003 Constructional details, e.g. physical layout, assembly, wiring or busbar connections
• CPC Class Codes: H05K 1/18 Printed circuits structurally associated with non-printed electric components H05K1/0201, H05K1/023, H05K1/0243, and H05K1/16 take precedence
• CPC Class Codes: H05K 2201/10166 Transistor
• CPC Class Codes: H05K 2201/10409 Screws
• CPC Class Codes: H05K 2201/10568 Integral adaptations of a component or an auxiliary PCB for mounting, e.g. integral spacer element
• CPC Class Codes: H05K 2201/10659 Different types of terminals for the same component, e.g. solder balls combined with leads
• CPC Class Codes: H05K 3/325 by abutting or pinching, i.e. without alloying process; mechanical auxiliary parts therefor adaptations of leads inserted in holes for press-fit connections H05K3/308

Abstract

A semiconductor device includes at least one semiconductor element contained in a casing, with main terminals and auxiliary terminals drawn from the semiconductor electrodes disposed on the upper face of the casing. The main terminals and the auxiliary terminals are arranged on the same plane at the same height without disposing partitions between the terminals so that the devices can be mounted on a printed wiring board on which the necessary conductor patterns for the main circuit have already been formed. In an alternative embodiment, the main terminals are arranged at a level slightly higher than the auxiliary terminals with the auxiliary terminals being surrounded by a supporting guide.

Claims

1. A semiconductor device adapted to be interconnected with planar conductor means having a connector of a predetermined height mounted on its bottom surface, the semiconductor device comprising:

a casing having an upper face and side faces, said upper face having a first level and a second level, said second level being lower than said first level;

at least one set of semiconductor elements disposed within said casing, each semiconductor element of a set having two main electrodes and at least one auxiliary electrode for controlling a current flowing between the main electrodes;

main terminals connected to one or more of main electrodes of said semiconductor elements, said main terminals emerging from said first level of said upper face of said casing and all terminating with respective ends disposed in a first common plane which is parallel to the first level of said upper face of said casing;

auxiliary terminals connected to one or more of auxiliary electrodes and main electrodes of said semiconductor elements, said auxiliary terminals emerging from said second level of said upper face of said casing and all terminating with respective ends disposed in a second common plane which is parallel to the second level of said upper face of said casing; and

a supporting guide having a predetermined height surrounding the area on said second level of said upper face of said casing where said auxiliary terminals emerge, the predetermined height being substantially equal to the difference between the predetermined height of the connector and the distance between the first common plane and the second level of said upper face of said casing so that the connector is supported by the supporting guide.

2. The semiconductor device of claim 1 wherein the planar conductor means comprises a printed wiring board.

3. A semiconductor device adapted to be interconnected with planar conductor means having a connector mounted on an upper surface thereof, the semiconductor device comprising:

a casing having an upper face and side faces;

at least one set of semiconductor elements disposed within said casing, each semiconductor element of a set having two main electrodes and at least one auxiliary electrode for controlling a current flowing between the main electrodes;

main terminals connected to one or more of main electrodes of said semiconductor elements, said main terminals emerging from said upper face of said casing and all terminating with respective ends disposed in a first common plane which is higher than and parallel to said upper face of said casing;

auxiliary terminals connected to one or more of auxiliary electrodes and main electrodes of said semiconductor elements, said auxiliary terminals emerging from said upper face of said casing and all terminating with respective ends disposed in a second common plane which is parallel to said upper face of said casing; and

a supporting guide having a predetermined height surrounding the area on said upper face of said casing where said auxiliary terminals emerge, the predetermined height being substantially equal to the difference between the first common plane and said upper face of said casing so that the supporting guide partially supports the planar conductor means disposed in said first common plane.

4. The semiconductor device of claim 3, wherein the planar conductor means comprises a printed wiring board.

5. A semiconductor device comprising:

a casing having a planar upper face spaced a predetermined distance from a bottom face, and side faces;

at least one set of semiconductor elements disposed within said casing, each semiconductor element of a set having two main electrodes and at least one auxiliary electrode for controlling a current flowing between the main electrodes;

main terminals connected to one or more of main electrodes of at least one of said semiconductor elements and terminating at respective ends which are all disposed in a first common plane which is parallel to the upper face of said casing and free of barriers between said main terminals;

auxiliary terminals connected to one or more of auxiliary electrodes and main electrodes of said at least one semiconductor element and concentrated in an area of the upper face of said casing located next to one of said main terminals and terminating at respective ends which are all disposed in a second common plane which is parallel to said first common plane;

planar conductor means disposed in said first common plane for selectively interconnecting the ends of said main terminals;

a connector for making connection to said auxiliary terminals, said connector having a planar upper surface disposed parallel to the upper face of said casing, and being mounted on the bottom surface of said planar conductor means; and

a supporting guide surrounding said auxiliary terminals dimensioned to urge the planar upper surface of said connector against said planar conductor means.

6. The semiconductor device of claim 5, wherein the planar conductor means comprises a printed wiring board.