Electrical interconnect using particle enhanced joining of metal surfaces

• US 5,430,614 A
• Filed: 11/08/1993
• Issued: 07/04/1995
• Est. Priority Date: 02/14/1990
• Status: Expired due to Term

• Current Assignee: Bio Lab Naturals, Inc. (Limitless X Holdings, Inc.)
• Original Assignee: Particle Interconnect, Inc. (China Crescent Enterprises, Inc.)
• Inventors: Difrancesco, Louis
• Primary Examiner(s): Ledynh, Bot L.
• Application Number:
  US08/148,907
• Time in Patent Office: 603 Days
• Field of Search: 361/785, 361/760-764, 361/767, 361/784, 361/790, 361/792, 361/803, 174/256-261, 228/115-116, 29/846, 29/853, 156/60, 439/44, 439/65-66, 439/74
• US Class Current: 361/785
• CPC Class Codes: B23K 20/16 with interposition of special material to facilitate connection of the parts, e.g. material for absorbing or producing gas
• CPC Class Codes: B23K 35/02 characterised by mechanical features, e.g. shape
• CPC Class Codes: H01H 1/06 characterised by the shape or structure of the contact-making surface, e.g. grooved
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/48465 the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01004 Beryllium [Be]
• CPC Class Codes: H01L 2924/01014 Silicon [Si]
• CPC Class Codes: H01L 2924/01078 Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 Gold [Au]
• CPC Class Codes: H01L 2924/01087 Francium [Fr]
• CPC Class Codes: H01L 2924/10253 Silicon [Si]
• CPC Class Codes: H01L 2924/1532 the connection portion being formed on the die mounting surface of the substrate
• CPC Class Codes: H01L 2924/19041 being a capacitor
• CPC Class Codes: H01L 2924/30107 Inductance
• CPC Class Codes: H01L 2924/3011 Impedance
• CPC Class Codes: H05K 3/325 by abutting or pinching, i.e. without alloying process; mechanical auxiliary parts therefor adaptations of leads inserted in holes for press-fit connections H05K3/308
• CPC Class Codes: H05K 3/328 by welding
• CPC Class Codes: H05K 3/4007 : Surface contacts, e.g. bumps H05K3/4092 takes precedence; deposition of finish layers on pads H05K3/24; forming solder bumps H05K3/3457

Abstract

A method and apparatus for electrically interconnecting various electronic elements, including circuit components, assemblies, and subassemblies. A particle enhanced material metal contact layer, having a surface, formed on the electronic elements, includes particles of greater hardness disposed on and/or within the metal contact layer, which particles form protuberances that concentrate stress when the contact surface is brought into contact with an opposing surface under pressure, to thereby penetrate the opposing surface and form a metal matrix between the two surfaces. The invention includes preferred and alternative embodiments incorporating particle enhanced material that provide a semiconductor test array which may be patterned as desired to receive an integrated circuit die and/or packaged components to facilitate integrated circuit and packaged electronic component testing; a probing device for testing integrated circuit die in situ on a semiconductor wafer; connectors for coupling discontinuous circuit element substrates; an interposer for interconnecting conventional components, circuit boards, and assemblies; and connectors for single and multiple layer circuit boards.

Claims

1. An integrated circuit carrier, comprising:

a terminal array formed on a surface of said integrated circuit carrier, said terminal array including individual contact elements, each contact element having base metal contact layer, including associated particles having a hardness greater than that of said base metal;

whereby a metal matrix is formed between each terminal array contact element and a corresponding electronic circuit termination when said particles pierce an electronic circuit termination surface.

2. The apparatus of claim 1, wherein at least two of said integrated circuit carriers are stacked to extend a circuit bus along said contact elements.

3. An apparatus for electrically coupling discontinuous component substrates, comprising:

a first substrate having a terminal array;

a second substrate having a terminal array;

a contact layer comprising a base metal formed on each individual terminal of at least one of said terminal arrays, said contact layer on at least one of said terminal arrays including associated particles having a hardness greater than that of said base metal; and

means for applying compressive force normal to said first substrate and said second substrate;

whereby a metal matrix is formed between each individual terminal of said first substrate terminal array and a corresponding terminal of said second substrate terminal array when said particles on each individual terminal of said at least one substrate terminal array pierce a surface portion of a corresponding terminal on said other substrate terminal array.

4. The apparatus of claim 3, wherein at least one of said substrates is a flexible substrate.

5. An apparatus for interconnecting a first and a second conventional electronic elements, comprising:

an interconnect element having a first and a second opposite surface, said interconnect element disposable between said first and said second electronic elements, said interconnect element having a patterned complementary base metal layer on each of said surfaces, said layers including associated particles having a hardness greater than that of said base metal;

whereby a conductive metal matrix is formed between each of said interconnect element surfaces and a corresponding surface of said first and second electronic elements when said electronic elements are brought into compressive contact with said interconnect element and said particles pierce said electronic element surface.

6. The apparatus of claim 5, further comprising:

offset first and second electronic elements.

7. The apparatus of claim 6, wherein said interconnect element is flexible.

8. The apparatus of claim 5, further comprising:

overlapping first and second electronic elements.

9. An apparatus for interconnecting a circuit board to an electronic circuit, comprising:

a terminal array formed on a surface of said circuit board, said terminal array including individual contact elements, each contact element having base metal contact layer, including associated particles having a hardness greater than that of said base metal; and

means for applying compressive force normal to said terminal array and an electronic circuit termination;

whereby a metal matrix is formed between each terminal array contact element and a corresponding electronic circuit termination when said particles pierce an electronic circuit termination surface.

10. The apparatus of claim 9, wherein said circuit board is a single layer board.

11. The apparatus of claim 9, wherein said circuit board is a multilayer board.

12. The apparatus of claim 9, further comprising:

a ranked terminal array formed on a surface of said circuit board, in which array rows correspond to board layers.