Integrated electro-optical package

• US 5,432,358 A
• Filed: 03/24/1994
• Issued: 07/11/1995
• Est. Priority Date: 03/24/1994
• Status: Expired due to Fees

• Current Assignee: Motorola, Inc. (Motorola Solutions, Inc.)
• Original Assignee: Motorola, Inc. (Motorola Solutions, Inc.)
• Inventors: Nelson, Ronald J., Stafford, John W.
• Primary Examiner(s): Mintel, William
• Assistant Examiner(s): TRAN, MINH LOAN
• Application Number:
  US08/216,995
• Time in Patent Office: 474 Days
• Field of Search: 257/81, 257/88, 257/98, 257/99, 257/685, 257/686, 257/723, 257/737, 257/787, 257/778, 361/767, 361/806, 361/808, 361/820
• US Class Current: 257/81
• CPC Class Codes: G09F 9/33 being semiconductor devices, e.g. diodes
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/73204 the bump connector being embedded into the layer connector
• CPC Class Codes: H01L 25/167 comprising optoelectronic devices, e.g. LED, photodiodes
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/09701 Low temperature co-fired ceramic [LTCC]

Abstract

An integrated electro-optical package including a semiconductor chip with a large array of light emitting devices formed thereon and cooperating to generate a complete real image. The light emitting devices are positioned in rows and columns and connected to pads adjacent outer edges of the chip. A window frame substrate having a central opening therethrough coextensive with the real image generated by the chip and mounting pads, bump bonded to the pads on the chip. A plurality of driver circuits connected to the light emitting devices through terminals on the window frame substrate. A lens mounted to the substrate over the opening and on a side opposite the chip to magnify the real image and produce an easily viewable virtual image.

Claims

1. An integrated electro-optical package comprising:

a semiconductor chip with an array of light emitting devices formed thereon and cooperating to generate a complete real image, the light emitting devices being positioned in rows and columns to define all pixels of the real image and operably connected to connection/mounting pads adjacent outer edges of the semiconductor chip;

a window frame substrate defining a central optically transparent light passage therethrough substantially coextensive with the real image generated by the semiconductor chip and mounting pads formed on a surface surrounding the central passage, the connection/mounting pads on the chip being bump bonded to the mounting pads on the substrate;

a plurality of driver circuits connected to the light emitting devices through terminals and the mounting pads on the window frame substrate; and

a lens system mounted to the substrate over the central passage and on a side of the substrate opposite the semiconductor chip to receive and magnify the real image and produce an easily viewable virtual image.

2. An integrated electro-optical package as claimed in claim 1 wherein the central optically transparent light passage through the window frame substrate includes an area formed of light transmitting material.

3. An integrated electro-optical package as claimed in claim 2 wherein the window frame substrate is formed of optically transparent glass.

4. An integrated electro-optical package as claimed in claim 3 wherein the semiconductor chip has a predetermined thermal coefficient of expansion and the optically transparent glass window frame substrate is formed of glass having a thermal coefficient of expansion substantially similar to the thermal coefficient of expansion of the semiconductor chip.

5. An integrated electro-optical package as claimed in claim 1 wherein the central optically transparent light passage through the window frame substrate includes an opening therethrough.

6. An integrated electro-optical package as claimed in claim 1 wherein the array of light emitting devices formed on the semiconductor chip is positioned in a push-pull array.

7. An integrated electro-optical package comprising:

a semiconductor chip having a major surface with an array of light emitting devices formed on the major surface at a central portion thereof and cooperating to generate a complete real image, each of the light emitting devices having first and second electrodes for activating the light emitting devices, the semiconductor chip further having external connection/mounting pads adjacent outer edges thereof and outside of the central portion of the major surface with the first electrodes of the light emitting devices being connected to a first plurality of the external connection/mounting pads and the second electrodes of the light emitting devices being connected to a second plurality of the external connection/mounting pads;

a window frame substrate having a major surface and defining a central optically transparent light passage therethrough substantially coextensive with the real image at the central portion of the major surface of the semiconductor chip, the window frame substrate further having a plurality of electrical conductors formed therein, each extending from a mounting pad adjacent an edge of the central passage to a connection pad on the major surface of the window frame substrate, the major surface of the semiconductor chip being mounted on the major surface of the window frame substrate with the first and second pluralities of external connection/mounting pads being in electrical contact with the mounting pads of the window frame substrate and the real image at the central portion of the major surface of the semiconductor chip being axially aligned and coextensive with the central passage in the major surface of the window frame substrate; and

a plurality of driver and controller circuits having data input terminals and further having control signal output terminals connected to the first and second terminals of the light emitting devices for activating the light emitting devices to generate real images in accordance with data signals applied to the data input terminals.

8. An integrated electro-optical package as claimed in claim 7 including in addition an optical magnification system positioned adjacent the central passage in the major surface of the window frame substrate for magnifying the complete real image generated by the semiconductor chip and producing a virtual image viewable by a human eye.

9. An integrated electro-optical package as claimed in claim 8 wherein the major surface of the semiconductor chip is generally rectangular in shape and the size is less than approximately one inch on a side.

10. An integrated electro-optical package as claimed in claim 9 wherein the central portion of the major surface of the semiconductor chip is generally rectangular in shape and the size is less than approximately one half inch on a side.

11. An integrated electro-optical package as claimed in claim 10 wherein the array of light emitting devices formed on the major surface at a central portion of the semiconductor chip includes light emitting devices formed in an area of the major surface less than approximately 10 microns in diameter.

12. An integrated electro-optical package as claimed in claim 11 wherein the array of light emitting devices formed on the major surface at a central portion of the semiconductor chip includes light emitting devices positioned in rows and columns with adjacent rows and adjacent columns being positioned less than approximately 30 microns apart.

13. An integrated electro-optical package as claimed in claim 12 wherein the plurality of electrical conductors formed on the major surface of the window frame substrate are positioned to fan out from the mounting pads to the connection pads and the connection pads on the major surface of the window frame substrate are positioned in rows and columns on the major surface thereof.

14. An integrated electro-optical package as claimed in claim 13 wherein the plurality of connection pads on the major surface of the window frame substrate are positioned in rows and columns on the major surface thereof on a pitch of from approximately 25 to 50 milli-inches.

15. An integrated electro-optical package as claimed in claim 14 wherein the array of light emitting devices formed on the major surface of the semiconductor chip include greater than approximately thirty thousand light emitting devices.

16. An integrated electro-optical package as claimed in claim 7 wherein the array of light emitting devices formed on the semiconductor chip is positioned in a push-pull array.

17. An integrated electro-optical package comprising:

a semiconductor chip having a major surface with a plurality of light emitting devices formed on the major surface, each of the light emitting devices having first and second electrodes for activating the light emitting devices, the light emitting devices defining a plurality of pixels positioned in rows and columns and cooperating to generate a complete real image, when activated, at a central portion of the major surface, the semiconductor chip further having external connection/mounting pads adjacent outer edges thereof and outside of the central portion of the major surface with the first electrodes of the light emitting devices being connected to a first plurality of the external connection/mounting pads defining rows of pixels and the second electrodes of the light emitting devices being connected to a second plurality of the external connection/mounting pads defining columns of pixels;

a window frame substrate having a major surface and defining a central optically transparent light passage therethrough substantially coextensive with the real image at the central portion of the major surface of the semiconductor chip, the window frame substrate further having a plurality of electrical conductors formed therein, each extending from a mounting pad adjacent an edge of the central passage to a connection pad on the major surface of the window frame substrate, the major surface of the semiconductor chip being mounted on the major surface of the window frame substrate with the first and second pluralities of external connection/mounting pads being in electrical contact with the mounting pads of the window frame substrate and the real image at the central portion of the major surface of the semiconductor chip being axially aligned and coextensive with the central passage in the major surface of the window frame substrate;

a plurality of driver and controller circuits having data input terminals and further having control signal output terminals adapted to be connected to the first and second terminals of the light emitting devices for activating the light emitting devices to generate real images in accordance with data signals applied to the data input terminals; and

a mounting board having first and second opposed major surfaces with first electrical connection pads on the first major surface, second electrical connection pads on the second major surface and electrical connections formed in the mounting board between the first and second electrical connection pads, the plurality of driver and controller circuits being mounted on the first side of the mounting board with the control signal output terminals electrically contacting the first electrical connection pads, the window frame substrate being mounted on the second major surface of the mounting board with the second electrical connection pads in electrical contact with the first and second pluralities of external connection/mounting pads.

18. An integrated electro-optical package as claimed in claim 17 including an optical lens mounted in the central passage of the window frame substrate.

19. An integrated electro-optical package as claimed in claim 17 wherein the second electrical connection pads on the second major surface of the mounting board include mounting bumps.

20. An integrated electro-optical package as claimed in claim 19 wherein the mounting bumps are formed from material selected from the group including solder, gold, and conducting epoxy.

21. An integrated electro-optical package as claimed in claim 17 wherein the first electrical connection pads on the first major surface of the mounting board include mounting bumps.

22. An integrated electro-optical package as claimed in claim 21 wherein the mounting bumps are formed from material selected from the group including solder, gold, and conducting epoxy.

23. An integrated electro-optical package as claimed in claim 17 wherein the mounting pads adjacent an edge of the central passage and the connection pads on the major surface of the window frame substrate include mounting bumps.

24. An integrated electro-optical package as claimed in claim 23 wherein the mounting bumps are formed from material selected from the group including solder, gold, and conducting epoxy.

25. An integrated electro-optical package as claimed in claim 17 wherein the window frame substrate is formed of material selected from the group including glass, silicon, thin film ceramic and ceramic with organic dielectric and thin film metallization.

26. An integrated electro-optical package as claimed in claim 17 wherein the light emitting devices include devices selected from the group including light emitting diodes, surface emitting lasers and field emission devices.

27. An integrated electro-optical package as claimed in claim 17 wherein the light emitting devices are formed on the major surface of the semiconductor chip into rows and columns and in a push-pull addressable array including rows and columns of connecting conductors electrically connected to the external connection/mounting pads, the connecting conductors being positioned on the substrate to correspond, one each, with the rows and columns of components and to couple to each first and second electrode of the components to provide an addressable array, with all of the first electrodes in each alternate column of the plurality of components being connected to a corresponding alternate column of the connecting conductors and all of the second electrodes of each interspersed column of the plurality of components being connected to the corresponding interspersed column of the connecting conductors, and each of the remaining first and second electrodes being connected to a corresponding row of connecting conductors.