Trench gate lateral MOSFET

• US 5,434,435 A
• Filed: 05/04/1994
• Issued: 07/18/1995
• Est. Priority Date: 05/04/1994
• Status: Expired due to Term

• Current Assignee: North Carolina State University (University of North Carolina System)
• Original Assignee: North Carolina State University (University of North Carolina System)
• Inventors: Baliga, B. Jayant
• Primary Examiner(s): Limanek, Robert P.
• Assistant Examiner(s): Fahmy, Wael M.
• Application Number:
  US08/238,222
• Time in Patent Office: 440 Days
• Field of Search: 257/330, 257/331, 257/332, 257/333, 257/334, 257/401, 257/622, 257/623, 257/487, 257/489, 257/491, 257/141, 257/139, 257/140, 257/329, 257/339
• US Class Current: 257/141
• CPC Class Codes: H01L 29/0653 adjoining the input or output region of a field-effect device, e.g. the source or drain region
• CPC Class Codes: H01L 29/4232 with insulated gate
• CPC Class Codes: H01L 29/42368 the thickness being non-uniform
• CPC Class Codes: H01L 29/4238 characterised by the surface lay-out
• CPC Class Codes: H01L 29/66674 DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region making lateral high-voltage MISFETs with channel well and drain offset region H01L29/66659
• CPC Class Codes: H01L 29/7824 with a substrate comprising an insulating layer, e.g. SOI-LDMOS transistors
• CPC Class Codes: H01L 29/7825 with trench gate electrode trench gate electrodes per se H01L29/4236

Abstract

A trench gate lateral MOSFET structure has the voltage supported along side walls and the bottom surface of the trench. With narrow source and drain mesa regions that are optimally doped, a uniform electric field is obtained vertically in the mesa regions and horizontally at the bottom of the trench, allowing a relative high doping level in an N-drift region resulting in specific on-resistances well below those of conventional lateral MOSFETs at a high breakdown voltage.

Claims

1. A trench gate lateral MOSFET, comprising:

a substrate layer;

an intermediate layer located on the substrate layer;

an N-drift layer located on the intermediate layer;

a P-base layer located on a first portion of the N-drift layer;

an N+ layer located on at least part of the P-base layer and on a second portion of the N-drift layer;

a trench located in the N-drift layer, the P-base layer and the N+ layer;

an oxide region formed within the trench;

a gate region located within the oxide region;

a source contact located on the P-base layer and the N+ layer on a first side of the trench and extending to a first edge of the trench; and

a drain contact located on the N+ layer on a second side of the trench and extending to a second edge of the trench, the source and drain contacts being located on a side of the N+ layer opposite from said substrate layer and the P-base layer being located only on the first side of the trench.

2. The trench gate lateral MOSFET of claim 1, wherein said intermediate layer comprises an isolating oxide layer so that said MOSFET is a dielectrically isolated type MOSFET.

3. The trench gate lateral MOSFET of claim 1, wherein said intermediate layer comprises a P-layer so that said MOSFET is a junction isolated type MOSFET.

4. The trench gate lateral MOSFET of claim 1, wherein the gate region is located within the oxide region closer to the first side of the trench than to the second side of the trench.

5. The trench gate lateral MOSFET of claim 1, wherein mesa regions located between the source contact and the intermediate layer and between the drain contact and the intermediate layer have a thickness measured perpendicular to sidewalls of the trench selected to optimize coupling of charges within the N-drift layer to the gate region along the sidewalls to produce a substantially uniform electric field along the mesa regions.

6. The trench gate lateral MOSFET of claim 1, wherein an isolating portion of the N-drift layer extending between a bottom surface of the trench and the intermediate layer has a thickness measured parallel to sidewalls of the trench selected to optimize coupling of charges within the isolating portion of the N-drift layer to the gate region along the bottom of the trench to produce a substantially uniform electric field along the bottom of the trench.

7. The trench gate lateral MOSFET of claim 1, wherein a cell pitch of said MOSFET is approximately 3 microns.

8. The trench gate lateral MOSFET of claim 1, wherein a specific on-resistance of said MOSFET is about 1.1 milliOhm-cm² at a breakdown voltage of 120 volts.

9. The trench gate lateral MOSFET of claim 3, wherein a bottom of said trench extends into the P-layer.

10. The trench gate lateral MOSFET of claim 9, further comprising a N ion-implanted region extending around the bottom of the trench in the P-region and along lower portions of sidewalls of the trench in the N-drift layer.

11. The trench gate lateral MOSFET of claim 10, wherein the N ion-implanted region is implanted with a surface concentration and depth selected to produce a substantially uniform electric field along the bottom of the trench.

12. The trench gate lateral MOSFET of claim 11, wherein a specific on-resistance of said MOSFET is 1.2 milliOhm-cm² at a breakdown voltage of 130 volts.

13. A trench gate lateral MOSFET, comprising:

a substrate layer;

an intermediate layer located on the substrate layer;

an N-drift layer located on the intermediate layer;

a P-base layer located on a first portion of the N-drift layer;

an N+ layer located on at least a portion the P-base layer and on a second portion of the N-drift layer;

a trench located in the N-drift layer, the P-base layer and the N+ layer;

an oxide region formed within the trench;

a gate region located within the oxide region;

a source contact located on the P-base layer and the N+ layer on a first side of the trench and extending to a first edge of the trench; and

a drain contact located on the N+ layer on a second side of the trench and extending to a second edge of the trench, the source and drain contacts being located on a side of the N+ layer opposite from said substrate layer, wherein mesa regions located between the source contact and the intermediate layer and between the drain contact and the intermediate layer have a dopant charge equal to a product of a width of the mesa regions measured perpendicular to sidewalls of the trench and doping concentrations of the mesa regions, the dopant charge selected to produce a substantially uniform electric field along the mesa regions and said MOSFET has a specific on-resistance of about 1.1 milliOhm-cm² and a breakdown voltage of about 120 volts.

14. The lateral trench gate MOSFET of claim 13, wherein the gate region extends within the N-drift layer.

16. The lateral trench gate MOSFET of claim 13, wherein said intermediate layer comprises an isolating oxide layer so that said MOSFET is a dielectrically isolated type MOSFET.

17. The trench gate lateral MOSFET of claim 13, wherein said intermediate layer comprises a P-layer so that said MOSFET is a junction isolated type MOSFET.

18. The trench gate lateral MOSFET of claim 13, wherein an isolating portion of the N-drift layer extending between a bottom surface of the trench and the intermediate layer has a doping charge equal to a product of a thickness measured parallel to sidewalls of the trench and a doping concentration, the doping charge selected to optimize coupling of charges within the isolating portion of the N-drift layer to the gate electrode along the bottom of the trench to produce a substantially uniform electric field along the bottom of the trench.

19. The trench gate lateral MOSFET of claim 18, wherein the doping charge of the isolating portion of the N-drift layer is between 1.0×

10¹² cm^-2 and 2.0×

10¹² cm^-2.

20. The trench gate lateral MOSFET of claim 13, wherein a cell pitch of said MOSFET is approximately 3 microns.

15. The lateral trench gate MOSFET of claim 15, wherein the dopant charge in the mesa regions is between 1.0×

10¹² cm^-2 and 2.0×

10¹² cm^-2.

21. A trench gate lateral MOSFET, comprising:

a substrate layer;

an intermediate layer located on the substrate layer;

an N-drift layer located on the intermediate layer;

a P-base layer located on a first portion of the N-drift layer;

a N+ layer located on at least a portion of the P-base layer and on a second portion of the N-drift layer;

a trench located in the N-drift layer, the P-base layer and the N+ layer;

an oxide region formed within the trench;

a gate region located within the oxide region;

an isolating portion of the N-drift layer extending between a bottom surface of the trench and the intermediate layer, the isolating portion having a dopant charge equal to a product of a doping concentration of the isolating portion and a thickness of the isolating portion measured parallel to sidewalls of the trench, the dopant charge being between 1.0×

10^-12 cm^-2 and 2.0×

10¹² cm^-2 so as to optimize coupling of charges within the isolating portion of the N-drift layer to the gate region along the bottom of the trench to produce a substantially uniform electric field along the bottom of the trench;

a source contact located on the P-base layer and the N+ layer on a first side of the trench and extending to a first edge of the trench;

a drain contact located on the N+ layer on a second side of the trench and extending to a second edge of the trench, the source and drain contacts being located on a side of the N+ layer opposite from said substrate layer; and

mesa regions located between the source contact and the intermediate layer and between the drain contact and the intermediate layer, said mesa regions having a doping charge equal to a product of a thickness of the mesa regions measured perpendicular to the sidewalls of the trench and a doping concentration of the mesa regions, the doping charge being in the range between 1.0×

10¹² cm^-2 and 2.0×

10¹² cm^-2 so as to produce a substantially uniform electric field along the mesa regions.