Wafer sensing and clamping monitor

• US 5,436,790 A
• Filed: 01/15/1993
• Issued: 07/25/1995
• Est. Priority Date: 01/15/1993
• Status: Expired due to Term

• Current Assignee: Axcelis Technologies Incorporated
• Original Assignee: Eaton Corp. (Wisconsin) (Eaton Corporation PLC.)
• Inventors: Holden, Scott C., Tu, Weilin, Blake, Julian G., Stone, Dale K.
• Primary Examiner(s): Pellinen, A. D.
• Assistant Examiner(s): Fleming, Fritz M.
• Application Number:
  US08/005,030
• Time in Patent Office: 921 Days
• Field of Search: 361/230, 361/233, 361/234, 361/235, 437/8, 324/713, 324/715, 324/718, 324/724, 324/158 F, 324/158 P, 279/126, 279/128, 29/900, 248/309.3, 248/309.4, 269/8, 269/903
• US Class Current: 361/234
• CPC Class Codes: H01L 21/67259 Position monitoring, e.g. misposition detection or presence detection
• CPC Class Codes: H01L 21/6831 using electrostatic chucks

Abstract

A wafer position and clamp sensor. A circuit monitors capacitance between two electrodes within a wafer support. With no wafer on the support, the capacitance falls in one range, with the wafer in place but not clamped, the capacitance falls in a second range and with the wafer held in place by an electrostatic attraction the capacitance falls in a third range. The sensed capacitance is converted to a frequency and then a DC voltage level that can easily be sensed and used to confirm wafer placement and then confirm wafer clamping.

Claims

1. Apparatus for securing a semiconductor wafer to a wafer support comprising:

a) a wafer support including spaced electrodes for attracting wafers to the wafer support by means of an electrostatic attraction between the wafer support and wafers placed onto the wafer support;

b) capacitive sensing circuitry coupled to the spaced electrodes for monitoring a capacitance and producing an output signal related to said capacitance;

c) a power supply for energizing the two electrodes; and

d) a controller to apply energization signals from the power supply to the two electrodes, thereby attracting the wafer to the wafer support once a wafer has been placed onto the wafer support;

e) said controller including an input coupled to an output from the capacitive sensing circuitry corresponding to a sensed capacitance indicating a presence of the wafer on the wafer support and having an output for initiating one or more processing steps based upon a change in the output from the capacitive sensing circuit indicating the wafer is properly secured to the wafer support.

3. The method of claim 1 wherein the step of securing the wafer is accomplished by applying a direct current voltage between the two electrodes.

4. The method of claim 1 wherein the monitoring step includes a substep of generating a warning message and suspending movement of the wafer support to an implant position if proper securement of the wafer to the support is not sensed.

5. The method of claim 1 wherein the step of providing a capacitance signal is performed by creating a direct current signal related to the capacitance between the two electrodes.

2. A method for controlling ion implantation of a semiconductor wafer that is electrostatically attracted to a wafer support prior to implantation comprising the steps of:

a) sensing placement of a semiconductor wafer on a wafer support by providing a capacitance signal related to a capacitance between two electrodes attached to the support and determining if the capacitance signal indicates a wafer has been placed onto the support;

b) once the capacitance signal related to the capacitance between the two electrodes reaches a value indicating a wafer has been placed on the support, securing the wafer to the support by energizing the two electrodes to create an electrostatic attraction between the wafer and the support;

c) monitoring a change in the capacitance signal related to the capacitance between the two electrodes as the electrostatic attraction is created to assure the wafer has been properly secured to the support by the electrostatic attraction; and

d) in the event the capacitance signal does not reach a value indicating the wafer has been properly secured to the support, suspending ion implantation of the wafer.

6. Ion implantation apparatus for securing a semiconductor wafer to a wafer support comprising:

a) a wafer support including two electrodes for attracting wafers to the wafer support by means of an electrostatic attraction;

b) capacitive sensing circuitry electrically coupled to the electrodes for generating an indicating signal corresponding to a capacitance between the two electrodes;

c) a power supply coupled to the two electrodes for providing an energizing signal to the two electrodes; and

d) a controller coupled to the power supply for causing the power supply to energize the two electrodes, thereby attracting the wafer to the wafer support once a wafer has been placed into the wafer support;

e) said controller including an input coupled to the capacitive sensing circuitry for receipt of the indicating signal corresponding to a sensed capacitance for determining if a wafer is on the wafer support and for determining if the wafer is properly secured to the wafer support and further including means for initiating ion implantation of the semiconductor wafer after the indicating signal indicates the wafer has been properly secured to the wafer support.

7. The apparatus of claim 6 further comprising robotic means coupled to the controller for re-orienting the wafer support and moving said wafer into an ion implant orientation, said controller including means for de-activating the robotic means if the indicating signal indicates that the wafer is not properly secured to the wafer support.

9. The electrostatic chuck of claim 7 wherein the means for sensing further comprises an integrator circuit coupled to the oscillator:

circuit for converting the frequency signal to a voltage level.

8. An electrostatic chuck for semiconductor wafers comprising:

a) a first dielectric layer engageable by said wafer during ion implantation of said wafer;

b) a base member supporting said first dielectric layer;

c) first and second electrodes positioned between said first dielectric layer and said base member;

d) power supply means for applying an electric potential to said first and second electrodes to create an electrostatic attractive force between said first dielectric layer and said wafer, said attractive force being substantially uniformly distributed across the surface of the wafer;

e) capacitance sensing circuitry for sensing a capacitance between the first and second electrodes comprising;

i) an oscillator circuit having first and second inputs connected to the first and second electrodes for providing an oscillator output whose frequency changes as the capacitance between electrodes changes; and

ii) output circuitry for converting the frequency to an indicating signal; and

f) a controller coupled to the capacitive sensing circuitry for monitoring the indicating signal and causing the power supply to electrostatically attract a wafer to the first dielectric layer after the indicating signal reaches a first level and for initiating wafer processing steps after the power supply has properly secured the wafer to the first dielectric layer as indicated by the indicating signal reaching a second level.