Addressing method and apparatus for a computer system

• US 5,437,019 A
• Filed: 03/23/1994
• Issued: 07/25/1995
• Est. Priority Date: 12/17/1990
• Status: Expired due to Fees

• Current Assignee: Avago Technologies General IP (Singapore) PTE Limited (Broadcom, Inc.)
• Original Assignee: Hewlett-Packard Company (HP Inc.)
• Inventors: Brockmann, Russell C.
• Primary Examiner(s): RUDOLPH, REBECCA
• Application Number:
  US08/217,001
• Time in Patent Office: 489 Days
• Field of Search: 365/63, 365/69, 365/230.03, 365/230.04, 395/400, 395/425, 340/825.52, 340/825.07
• US Class Current: 711/5
• CPC Class Codes: G06F 12/0676 the address being position dependent

Abstract

Each card slot in a computer system receives a different ordering of address lines than each of the other card slots so that the ordering of the address lines at each card slot is indicative of its physical address relative to the other card slots. Means responsive to codes provided on at least selected ones of the address lines for establishing the hard and soft physical addresses of cards to be inserted into the slots may be provided.

Claims

1. Computer system comprising a bus having a plurality of address lines coupled to plural card slots in the system, each card slot receiving a different ordering of address lines than other ones of the card slots, the ordering of the address lines at each card slot being indicative of the physical location of the card slot relative to the other card slots in the system, wherein cards are installed in the card slots and each card comprises means responsive to a first remotely generated control signal for receiving a first code provided on at least selected ones of the address lines and for establishing therefrom a hard physical address of the card based at least in part upon the first code and the ordering of address lines at the slot in which the card is installed, the first code being received differently by each card as a result of the different ordering of address lines at each card slot.

2. Computer system according to claim 1 wherein each card further comprises means responsive to the hard physical address of the card, to a second code provided on at least selected ones of the address lines, and to a second remotely generated control signal for establishing a soft physical address of the card, said soft physical address determining an address range of the card.

3. Computer system according to claim 2 wherein the second code and second control signal are provided during an initial phase of operation of the computer.

4. Computer system according to claim 2 wherein said means for establishing a soft physical address comprises latch means having at least a pair of data inputs for receiving the second code and a clock input for receiving an indication that the card has been selected during the occurrence of the second control signal, the latch means latching the second code in response to the occurrence of the indication.

5. Computer system according to claim 1 wherein the first code and first control signal are provided during an initial phase of operation of the computer.

6. Computer system according to claim 1 wherein the ordering of selected pairs of address lines is reversed at each card slot relative to immediately preceding and immediately succeeding card slots in the system.

7. Computer system according to claim 6 wherein the ordering of a lowest order pair of address lines is reversed at every other card slot in the system, and the ordering of each succeeding higher order pair of address lines is reversed at half the frequency of the ordering of each immediately preceding pair of address lines.

8. Computer system according to claim 1 wherein the first code is an XOR pattern of bit pairs of the address lines.

9. Computer system according to claim 1 wherein said means for receiving the first code and for establishing a hard physical address therefrom comprises latch means having at least a pair of data inputs for receiving the first code and a clock input for receiving the first control signal, the latch means latching the first code in response to the occurrence of the first control signal.

10. Computer system according to claim 9 wherein said means for establishing a hard physical address further comprises comparator means for comparing the latched first code to address bits provided on selected ones of the address lines and providing an indication of the result of the comparison on an output thereof, and logic means responsive to the output of the comparator means and to an additional control signal for providing a signal indicating that the card has been selected during the occurrence of the additional control signal.

11. Computer system according to claim 1 wherein the address lines emanate from a processor associated with the computer system in a preselected order and cards are installed in the card slots and, in the case of any card slots whose received ordering of address lines is different from the preselected order, the cards installed therein comprise first means for effectively re-establishing the pre-selected order at the card.

12. Computer system according to claim 11 wherein each card further comprises second means for latching a code appearing on selected ones of the address lines during an initial phase of operation of the computer system and the first means comprises selector means receiving the address lines as inputs and responsive to the latched code for selecting the address lines in the preselected order.

13. Computer system comprising:

a) an address bus having a plurality of address lines;

b) a plurality of card slots coupled to the address lines, each card slot receiving a different ordering of address lines than other ones of the card slots, the ordering of the address lines at each card slot being indicative of a physical address of the card slot;

c) a plurality of cards for insertion into the card slots, each card comprising first means responsive to a first code provided on at least selected ones of the address lines and to a first remotely generated control signal for establishing a physical address of the card, a different code being provided to each said card due at least in part to the unique ordering of the address lines at each card slot, and, second means responsive to a second code provided on the selected ones of the address lines and to a second remotely generated control signal for establishing an address range of the card.

14. Computer system according to claim 13 wherein the address lines emanate from a processor associated with the computer system in a preselected order but the ordering changes from card slot to card slot, and each card further comprises selector means receiving address lines as inputs and responsive to an output of the first means to select between inputs to effectively re-establish the preselected order on the card.

15. Computer system according to claim 13, wherein the ordering of selected pairs of address lines is reversed at each card slot relative to immediately preceding and immediately succeeding card slots in the system, the ordering of a lowest order pair of address lines being reversed at every other card slot and the ordering of each succeeding higher order pair of address lines being reversed at half the frequency of the ordering of each immediately preceding pair of address lines.

16. Computer system comprising:

a) an address bus having a plurality of address lines emanating from a processor associated with the system in a preselected order;

b) a plurality of card slots coupled to the address lines and receiving an ordering of the address lines that is different from the preselected ordering, each card slot receiving a different ordering of address lines than other ones of the card slots, the ordering of selected pairs of address lines being reversed at each card slot relative to immediately preceding and immediately succeeding card slots in the system, the ordering of a lowest order pair of address lines being reversed at every other card slot and the ordering of each succeeding higher order pair of address lines being reversed at half the frequency of the ordering of each immediately preceding pair of address lines, the ordering of the address lines at each card slot being indicative of a physical address of the card slot;

c) a plurality of cards for insertion into the card slots, each card comprising first means responsive to a first code provided on at least selected ones of the address lines and to a first remotely generated control signal for establishing a physical address of the card, a different code being provided to each said card due at least in part to the unique ordering of the address lines at each card slot, and, second means responsive to a second code provided on the selected ones of the address lines and to a second remotely generated control signal for establishing an address range of the card, each card further comprising selector means receiving address lines as inputs and responsive to an output of the first means to select between inputs to effectively re-establish the preselected order of address lines on the card;

the address range of each card thereby being established without user intervention, switches or any dedicated signal pins on the card slots.

17. In a computer system having a plurality of address lines coupled to plural card slots in the system with the address lines emanating from a processor associated with the system in a preselected order, a method of addressing cards inserted in the card slots without user intervention, address switches on the cards or any dedicated signal pins on the card slots, said method comprising the steps of:

(a) routing the address lines to the card slots in a different order than the preselected order, each card slot receiving a different ordering of address lines than other ones of the card slots, the ordering of the address lines at each card slot being indicative of the physical location of the card slot relative to the other card slots in the system; and

(b) receiving at each card, in response to a first remotely generated control signal, a first code provided on at least selected ones of the address lines and establishing therefrom a hard physical address of the card based at least in part upon the first code and the ordering of the address lines at the slot in which the card is installed, the first code being received differently by each card as a result of the different ordering of address lines at each card slot.

18. Method according to claim 17 wherein the address lines are routed so that the ordering of selected pairs of address lines is reversed at each card slot relative to immediately preceding and immediately succeeding card slots in the system, the ordering of a lowest order pair of address lines being reversed at every other card slot and the ordering of each succeeding higher order pair of address lines being reversed at half the frequency of the ordering of each immediately preceding pair of address lines.

19. Method according to claim 18 wherein the ordering of the address lines at each card slot corresponds to an address range of the card.

20. Method according to claim 17 further comprising the step of determining at each card, in response to a second code provided on at least selected ones of the address lines and to a second remotely generated control signal, a soft physical address of the card for establishing an address range of the card.

21. Method according to claim 17 further comprising the step of effectively re-establishing the preselected order at each card.

22. A computer card for use in a computer system that comprises a bus having a plurality of address lines coupled to plural card slots in the system, wherein each card slot receives a different ordering of address lines than other ones of the card slots, the ordering of the address lines at each card slot being indicative of the physical location of the card slot relative to the other card slots in the system, said card being insertable into one of said slots and having means responsive to a first remotely generated control signal for receiving a first code provided on at least selected ones of the address lines and for establishing therefrom a hard physical address of the card based at least in part upon the first code and the ordering of address lines at the slot in which the card is installed, the card receiving the first code differently than other cards in the system as a result of the different ordering of address lines at each card slot.

23. The card recited in claim 22 wherein the card further comprises means responsive to the hard physical address of the card, to a second code provided on at least selected ones of the address lines, and to a second remotely generated control signal for establishing a soft physical address of the card, said soft physical address determining an address range of the card.

24. The computer card recited in claim 22 wherein said means for receiving the first code and for establishing a hard physical address therefrom comprises latch means having at least a pair of data inputs for receiving the first code and a clock input for receiving the first control signal, the latch means latching the first code in response to the occurrence of the first control signal.

25. The computer card recited in claim 24 further comprising comparator means for comparing the latched code to address bits provided on selected ones of the address lines and providing an indication of the result of the comparison on an output thereof, and logic means responsive to the output of the comparator means and to an additional control signal for providing a signal indicating that the card has been selected during the occurrence of the additional control signal.

26. The computer card recited in claim 22 wherein the address lines emanate from a processor associated with the computer system in a preselected order before being ordered differently at each card slot, and wherein the card further comprises means for effectively re-establishing the preselected order of the address lines at a slot in which the card is installed.