Method of forming a capacitor using a photoresist contact sidewall having standing wave ripples

• US 5,438,011 A
• Filed: 03/03/1995
• Issued: 08/01/1995
• Est. Priority Date: 03/03/1995
• Status: Expired due to Term

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Howard, Bradley J., Blalock, Guy T.
• Primary Examiner(s): Chaudhuri, Olik
• Assistant Examiner(s): TSAI, H JEY
• Application Number:
  US08/397,885
• Time in Patent Office: 151 Days
• Field of Search: 437/52, 437/60, 437/919, 437/47
• US Class Current: 438/396
• CPC Class Codes: H01L 28/82 with an enlarged surface, e.g. formed by texturisation
• CPC Class Codes: H01L 28/84 being a rough surface, e.g. using hemispherical grains
• CPC Class Codes: H01L 28/90 having vertical extensions
• CPC Class Codes: H10B 12/033 the capacitor extending over the transistor
• CPC Class Codes: H10B 12/318 the storage electrode having multiple segments
• CPC Class Codes: Y10S 438/948 Radiation resist

Abstract

A method of forming a stacked container capacitor includes, a) providing a substrate having a node to which electrical connection to a capacitor is to be made; b) then, providing a layer of photoresist; c) patterning the photoresist to form a photoresist contact which overlaps within lateral confines of the node, and in a manner which produces inner photoresist contact sidewalls having standing wave ripples; d) providing a layer of sacrificial material over the photoresist and within the photoresist contact, the sacrificial layer having a thickness which less than completely fills the photoresist contact, the standing wave ripples first transferring to those regions of the sacrificial layer which overlap the photoresist contact inner sidewall standing wave ripples; e) anisotropically etching the sacrificial material to produce a male molding ring having outer sidewalls possessing the first transferred standing wave ripples; f) stripping the photoresist; g) providing a layer of electrically conductive material over and within the male molding ring, the first transferred standing wave ripples second transferring to those regions of the conductive layer which overlap the first transferred standing wave ripples; h) anisotropically etching the conductive layer to outwardly expose upper portions of the male molding ring and produce a capacitor container ring having inner sidewalls possessing the second transferred standing wave ripples, the capacitor container ring electrically contacting the node; i) stripping the male molding ring from the substrate; and j) providing a capacitor dielectric layer and outer capacitor plate over the capacitor container rippled inner sidewalls.

Claims

1. A semiconductor processing method of forming a stacked container capacitor comprising the following steps:

providing a substrate having a node to which electrical connection to a capacitor is to be made;

providing a layer of photoresist over the substrate and node;

patterning the photoresist to form a photoresist contact which overlaps within lateral confines of the node, the photoresist being patterned in a manner which produces inner photoresist contact sidewalls having standing wave ripples, the photoresist contact opening having an open width;

providing a layer of sacrificial material over the patterned photoresist and within the photoresist contact, the sacrificial layer being provided to a thickness which is less than one half the open width to less than completely fill the photoresist contact, the standing wave ripples first transferring to those regions of the sacrificial layer which overlap the photoresist contact inner sidewall standing wave ripples;

anisotropically etching the sacrificial material to produce a male molding ring having outer sidewalls possessing the first transferred standing wave ripples;

stripping the photoresist from the substrate;

providing a layer of electrically conductive material over and within the male molding ring, the first transferred standing wave ripples second transferring to those regions of the conductive layer which overlap the first transferred standing wave ripples;

anisotropically etching the conductive layer to outwardly expose upper portions of the male molding ring and to produce a capacitor container ring having inner sidewalls possessing the second transferred standing wave ripples, the capacitor container ring making electrical connection with the node;

stripping the male molding ring from the substrate;

providing a capacitor dielectric layer over the capacitor container rippled inner sidewalls; and

providing an outer capacitor plate over the capacitor dielectric layer.

2. The semiconductor processing method of forming a stacked container capacitor of claim 1 wherein the electrically conductive layer is provided to completely fill the internal portion of the male molding ring, the step of anisotropically etching the conductive layer also producing a pillar within the formed capacitor container ring, the pillar electrically connecting with the node.

3. The semiconductor processing method of forming a stacked container capacitor of claim 1 wherein the electrically conductive layer is provided to completely fill the internal portion of the male molding ring, the step of anisotropically etching the conductive layer also producing a pillar within the formed capacitor container ring, the pillar physically contacting the node.

4. The semiconductor processing method of forming a stacked container capacitor of claim 1 wherein the electrically conductive layer is provided to completely fill the internal portion of the male molding ring, the step of anisotropically etching the conductive layer also producing a pillar within the formed capacitor container ring, the pillar electrically connecting with the node, the capacitor container ring making electrical contact with the node through the pillar.

5. The semiconductor processing method of forming a stacked container capacitor of claim 1 wherein the sacrificial material comprises silicon dioxide.

6. The semiconductor processing method of forming a stacked container capacitor of claim 1 wherein the conductive layer comprises conductively doped polysilicon.

7. The semiconductor processing method of forming a stacked container capacitor of claim 1 wherein the sacrificial material comprises silicon dioxide, and the conductive layer comprises conductively doped polysilicon.

8. A semiconductor processing method of forming a stacked container capacitor comprising the following steps:

providing a substrate having a node to which electrical connection to a capacitor is to be made;

providing a first conductive layer over the substrate and node;

providing a layer of photoresist over the first conductive layer;

patterning the photoresist to form a photoresist contact which overlaps within lateral confines of the node, the photoresist being patterned in a manner which produces inner photoresist contact sidewalls having standing wave ripples, the photoresist contact opening having an open width;

providing a layer of sacrificial material over the patterned photoresist and within the photoresist contact, the sacrificial layer being provided to a thickness which is less than one half the open width to less than completely fill the photoresist contact, the standing wave ripples first transferring to those regions of the sacrificial layer which overlap the photoresist contact inner sidewall standing wave ripples;

anisotropically etching the sacrificial material to produce a male molding ring having outer sidewalls possessing the first transferred standing wave ripples, the underlying first conductive layer being outwardly exposed within the male molding ring;

stripping the photoresist from the substrate;

providing a second layer of electrically conductive material over and within the male molding ring, the first transferred standing wave ripples second transferring to those regions of the second conductive layer which overlap the first transferred standing wave ripples, the second layer of conductive material electrically connecting with the node;

anisotropically etching the second conductive layer, a) to outwardly expose upper portions of the male molding ring, b) to produce a capacitor container ring having inner sidewalls possessing the second transferred standing wave ripples, and c) etching the first conductive layer;

the capacitor container ring making electrical connection with the node through the first conductive layer;

stripping the male molding ring from the substrate;

providing a capacitor dielectric layer over the capacitor container rippled inner sidewalls; and

providing an outer capacitor plate over the capacitor dielectric layer.

9. The semiconductor processing method of forming a stacked container capacitor of claim 8 wherein the second electrically conductive layer is provided to completely fill the internal portion of the male molding ring, the step of anisotropically etching the second conductive layer also producing a pillar within the formed capacitor container ring, the pillar electrically connecting with the node.

10. The semiconductor processing method of forming a stacked container capacitor of claim 8 wherein the second electrically conductive layer is provided to completely fill the internal portion of the male molding ring, the step of anisotropically etching the second conductive layer also producing a pillar within the formed capacitor container ring, the pillar physically contacting the node.

11. The semiconductor processing method of forming a stacked container capacitor of claim 8 wherein the second electrically conductive layer is provided to completely fill the internal portion of the male molding ring, the step of anisotropically etching the second conductive layer also producing a pillar within the formed capacitor container ring, the pillar electrically connecting with the node, the capacitor container ring making electrical contact with the node through the pillar.

12. The semiconductor processing method of forming a stacked container capacitor of claim 8 wherein the sacrificial material comprises silicon dioxide.

13. The semiconductor processing method of forming a stacked container capacitor of claim 8 wherein the first conductive layer comprises conductively doped polysilicon.

14. The semiconductor processing method of forming a stacked container capacitor of claim 8 wherein the second conductive layer comprises conductively doped polysilicon.

15. The semiconductor processing method of forming a stacked container capacitor of claim 8 wherein the first conductive layer comprises conductively doped polysilicon, and the second conductive layer comprises conductively doped polysilicon.

16. The semiconductor processing method of forming a stacked container capacitor of claim 8 wherein the sacrificial material comprises silicon dioxide, the first conductive layer comprises conductively doped polysilicon, and the second conductive layer comprises conductively doped polysilicon.

17. A semiconductor processing method of forming a stacked container capacitor comprising the following steps:

providing a substrate having a node to which electrical connection to a capacitor is to be made;

providing an etch stop layer over the substrate and node;

providing a first conductive layer over the etch stop layer;

providing a layer of photoresist over the first conductive layer;

patterning the photoresist to form a photoresist contact which overlaps within lateral confines of the node, the photoresist being patterned in a manner which produces inner photoresist contact sidewalls having standing wave ripples, the photoresist contact opening having an open width;

providing a layer of sacrificial material over the patterned photoresist and within the photoresist contact, the sacrificial layer being provided to a thickness which is less than one half the open width to less than completely fill the photoresist contact, the standing wave ripples first transferring to those regions of the sacrificial layer which overlap the photoresist contact inner sidewall standing wave ripples;

anisotropically etching the sacrificial material to produce a male molding ring having outer sidewalls possessing the first transferred standing wave ripples, the underlying first conductive layer being outwardly exposed within the male molding ring;

etching the first conductive material layer and underlying etch stop layer material from within the male molding ring to outwardly expose the node;

stripping the photoresist from the substrate;

providing a second layer of electrically conductive material over and within the male molding ring, the first transferred standing wave ripples second transferring to those regions of the second conductive layer which overlap the first transferred standing wave ripples, the second layer of conductive material electrically connecting with the node;

anisotropically etching the second conductive layer, a) to outwardly expose upper portions of the male molding ring, b) to produce a capacitor container ring having inner sidewalls possessing the second transferred standing wave ripples, and c) etching the first conductive layer using the etch stop layer as an etch stop;

the capacitor container ring making electrical connection with the node through the first conductive layer;

stripping the male molding ring from the substrate;

providing a capacitor dielectric layer over the capacitor container rippled inner sidewalls; and

providing an outer capacitor plate over the capacitor dielectric layer.

18. The semiconductor processing method of forming a stacked container capacitor of claim 17 wherein the second electrically conductive layer is provided to completely fill the internal portion of the male molding ring, the step of anisotropically etching the second conductive layer also producing a pillar within the formed capacitor container ring, the pillar electrically connecting with the node.

19. The semiconductor processing method of forming a stacked container capacitor of claim 17 wherein the second electrically conductive layer is provided to completely fill the internal portion of the male molding ring, the step of anisotropically etching the second conductive layer also producing a pillar within the formed capacitor container ring, the pillar physically contacting the node through the etch stop layer.

20. The semiconductor processing method of forming a stacked container capacitor of claim 17 wherein the second electrically conductive layer is provided to completely fill the internal portion of the male molding ring, the step of anisotropically etching the second conductive layer also producing a pillar within the formed capacitor container ring, the pillar electrically connecting with the node, the capacitor container ring making electrical contact with the node through the pillar.

21. The semiconductor processing method of forming a stacked container capacitor of claim 17 wherein the sacrificial material comprises silicon dioxide.

22. The semiconductor processing method of forming a stacked container capacitor of claim 17 wherein the first conductive layer comprises conductively doped polysilicon.

23. The semiconductor processing method of forming a stacked container capacitor of claim 17 wherein the second conductive layer comprises conductively doped polysilicon.

24. The semiconductor processing method of forming a stacked container capacitor of claim 17 wherein the first conductive layer comprises conductively doped polysilicon, and the second conductive layer comprises conductively doped polysilicon.

25. The semiconductor processing method of forming a stacked container capacitor of claim 17 wherein the sacrificial material comprises silicon dioxide, the first conductive layer comprises conductively doped polysilicon, and the second conductive layer comprises conductively doped polysilicon.