Nonvolatile memory with volatile memory buffer and a backup power supply system
First Claim
1. A memory device, comprising:
- (A) a nonvolatile memory array;
(B) control circuitry coupled to the memory array for controlling operations of the memory array;
(C) a volatile memory buffer coupled to the control circuitry for buffering data to be written into the memory array, wherein the control circuitry fetches the data from the memory buffer to store in the memory array;
(D) a power supply control circuit coupled to the volatile memory buffer, a power supply, and a backup power supply for detecting loss of the power supply applied to the memory buffer and for coupling the backup power supply to the memory buffer when the power supply is disconnected from the memory buffer such that data integrity of the memory device is maintained, wherein the nonvolatile memory array, the control circuitry, the volatile memory buffer, and the power supply control circuit all reside on a single semiconductor substrate.
1 Assignment
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Accused Products
Abstract
A memory device that resides on a single substrate includes a nonvolatile memory array. Control circuitry is coupled to the memory array for controlling memory operations with respect to the memory array. A volatile memory buffer is coupled to the control circuitry for buffering data that is to be written into the memory array. The control circuitry fetches the data from the memory buffer to store in the memory array. A power supply control circuit is provided for detecting loss of a power supply applied to the memory buffer and for coupling a backup power supply to the memory buffer when the power supply is disconnected from the memory buffer such that data integrity of the memory device is maintained.
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Citations
14 Claims
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1. A memory device, comprising:
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(A) a nonvolatile memory array; (B) control circuitry coupled to the memory array for controlling operations of the memory array; (C) a volatile memory buffer coupled to the control circuitry for buffering data to be written into the memory array, wherein the control circuitry fetches the data from the memory buffer to store in the memory array; (D) a power supply control circuit coupled to the volatile memory buffer, a power supply, and a backup power supply for detecting loss of the power supply applied to the memory buffer and for coupling the backup power supply to the memory buffer when the power supply is disconnected from the memory buffer such that data integrity of the memory device is maintained, wherein the nonvolatile memory array, the control circuitry, the volatile memory buffer, and the power supply control circuit all reside on a single semiconductor substrate. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A computer system, comprising:
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(A) a system bus; (B) a central processing unit (CPU) coupled to the system bus; (C) a plurality of peripheral devices, each of which being coupled to the system bus; (D) a memory device coupled to the system bus, wherein the memory device resides on a single semiconductor substrate, wherein the memory device further comprises (i) a nonvolatile memory array; (ii) control circuitry coupled to the memory array for controlling operations of the memory array; (iii) a volatile memory buffer coupled to the control circuitry for buffering data to be written into the memory array, wherein the control circuitry fetches the data from the memory buffer to store in the memory array; and (iv) a power supply control circuit coupled to the volatile memory buffer, a power supply, and a backup power supply for detecting loss of the power supply applied to the memory buffer and for coupling the backup power supply to the memory buffer when the power supply is disconnected from the memory buffer such that data integrity of the memory device is maintained, wherein the nonvolatile memory array, the control circuitry, the volatile memory buffer, and the power supply control circuit all reside on the single semiconductor substrate. - View Dependent Claims (9, 10, 11, 12, 13, 14)
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Specification