Programmable circuit with fusible latch

• US 5,440,246 A
• Filed: 03/22/1994
• Issued: 08/08/1995
• Est. Priority Date: 03/22/1994
• Status: Expired due to Term

• Current Assignee: ProMOS Technologies, Inc.
• Original Assignee: Mosel Vitelic Incorporated
• Inventors: Murray, Michael A., Li, Li-Chun, Tuan, Hsing T.
• Primary Examiner(s): Hudspeth, David R.
• Application Number:
  US08/216,208
• Time in Patent Office: 504 Days
• Field of Search: 307/202.1, 307/441, 307/443, 307/451, 307/469, 307/272.2, 365/96, 365/200, 326/38, 326/46, 326/121, 327/525
• US Class Current: 326/38
• CPC Class Codes: H03K 3/356104 using complementary field-effect transistors H03K3/35625 takes precedence

Abstract

A logical latch is permanently programmable to a selected state for use as a control circuit with extremely low power consumption in an integrated circuit.

Claims

1. A programmable logical latch circuit for controlling another circuit, comprising:

a first output lead and a second output lead;

a first fuse having a first terminal coupled to a supply voltage terminal and a second terminal coupled to said first output lead;

a first transistor of a first conductivity type having a first terminal coupled to said first output lead, a second terminal coupled to ground, and a gate coupled to said second output lead;

a second fuse having a first terminal coupled to said second output lead and a second terminal coupled to ground; and

a second transistor of a second conductivity type;

having a first terminal coupled to said supply voltage terminal, a second terminal coupled to said second output lead, and a gate coupled to said first output lead;

wherein said logical latch circuit, without any additional circuitry being required, is capable of assuming a first state if both said first and second fuses are intact and of assuming a second state if both said first and second fuses are opened.

2. A logical latch circuit as in claim 1 wherein said first and second fuses comprise polysilicon fuses which are capable of being open circuited by a laser pulse.

3. A logical latch circuit as in claim 2 wherein said first conductivity type comprises N-type conductivity and said second conductivity type comprises P-type conductivity.