Multi-dimensional array video processor system

• US 5,446,479 A
• Filed: 08/04/1992
• Issued: 08/29/1995
• Est. Priority Date: 02/27/1989
• Status: Expired due to Term

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: Thompson, E. Earle, DeMond, Thomas W.
• Primary Examiner(s): BRIER, JEFFERY A
• Application Number:
  US07/925,284
• Time in Patent Office: 1,120 Days
• Field of Search: 340/729, 340/798, 340/799, 340/754, 340/763, 340/784, 395/163, 395/164, 358/88, 358/90, 358/22, 345/139
• US Class Current: 345/6
• CPC Class Codes: G02B 26/0841 the reflecting element being moved or deformed by electrostatic means
• CPC Class Codes: G02B 30/50 the image being built up from image elements distributed over a 3D volume, e.g. voxels
• CPC Class Codes: G02B 30/54 the 3D volume being generated by moving a 2D surface, e.g. by vibrating or rotating the 2D surface
• CPC Class Codes: G09F 19/18 involving the use of optical projection means, e.g. projection of images on clouds projection apparatus per se G03B
• CPC Class Codes: G09G 2300/0809 Several active elements per pixel in active matrix panels
• CPC Class Codes: G09G 2300/0842 forming a memory circuit, e.g. a dynamic memory with one capacitor
• CPC Class Codes: G09G 2300/0847 being a dynamic memory without any storage capacitor, i.e. with use of parasitic capacitances as storage elements
• CPC Class Codes: G09G 3/346 based on modulation of the reflection angle, e.g. micromirrors micromirrors devices per se G02B26/0833
• CPC Class Codes: H04N 13/189 Recording image signals; Reproducing recorded image signals
• CPC Class Codes: H04N 13/194 Transmission of image signals
• CPC Class Codes: H04N 13/275 from 3D object models, e.g. computer-generated stereoscopic image signals
• CPC Class Codes: H04N 13/286 having separate monoscopic and stereoscopic modes
• CPC Class Codes: H04N 13/324 Colour aspects
• CPC Class Codes: H04N 13/363 using image projection screens volumetric display H04N13/388
• CPC Class Codes: H04N 13/365 using digital micromirror devices [DMD]
• CPC Class Codes: H04N 13/39 the picture elements emitting light at places where a pair of light beams intersect in a transparent material
• CPC Class Codes: H04N 13/393 the volume being generated by a moving, e.g. vibrating or rotating, surface
• CPC Class Codes: H04N 13/395 with depth sampling, i.e. the volume being constructed from a stack or sequence of 2D image planes
• CPC Class Codes: H04N 13/398 Synchronisation thereof; Control thereof
• CPC Class Codes: H04N 19/597 specially adapted for multi-view video sequence encoding
• CPC Class Codes: H04N 2005/7466 : Control circuits therefor
• CPC Class Codes: H04N 5/7458 : the modulator being an array of deformable mirrors, e.g. digital micromirror device [DMD]
• CPC Class Codes: H04N 9/3129 : scanning a light beam on the display screen scanning a light beam on a screen in displays other than projection devices G09G3/02; scanning systems in general G02B26/10; projectors using laser light sources in general H04N9/3161

Abstract

A digitized video system having a processor and a video memory. The processor converts a stream of digital information to extract planes of a three dimensional image to store into the video memory to display a three dimensional image. A spatial light modulator is connected to the video memory to receive and display a plane of said image to display a three dimensional image.

Claims

1. A multi-dimensional array processor system for generating a three dimensional image comprising:

(a) a video memory for storing image data representative of substantially all of said image, said image data being organized as a plurality of planes, each said plane corresponding to a two-dimensional slice of said image, wherein each said slice is independent of other of said slices and each said plane having a plurality of voxel data uniquely corresponding to individual display voxels; and

(b) a processor connected to receive encoded video information and operative to generate and store predetermined portions of one or more of said planes of said image into said memory.

2. A video display system having a multi-dimensional array processor for generating a three dimensional image in a three-dimensional display comprising:

(a) a video memory for storing image data representative of substantially all of said image, said image data being organized as a plurality of planes, each said plane corresponding to a two-dimensional slice of said image and each said plane having a plurality of voxel data uniquely corresponding to individual display voxels;

(b) a processor connected to receive encoded video information and operative to generate and store predetermined portions of one or more of said planes of said image into said memory; and

(c) a three dimensional display including a spatial light modulator, connected to said video memory for producing a plurality of individual energy beams to form a true three dimensional image.

3. System as in claim 2 wherein said spatial modulator includes:

(a) an array of individual display cells;

(b) each said display cell having at least two memory cells associated therewith, each said display cell selectively connected with one of said memory cells for control of said display cell;

(c) a first decoder for addressing said memory cells for storing information therein; and

(d) a second decoder for addressing selecting which of said memory cells is directly connected for control.

4. System as in claim 3 wherein each memory cell includes at least two components.

5. System as in claim 4 wherein one component is a transistor.

6. System as in claim 4 wherein one component stores capacitively.

7. System as in claim 4 wherein both components are transistors.

8. System as in claim 3 wherein said memory cell is implemented in CMOS.

9. System as in claim 3 wherein said memory cell is implemented in NMOS.

10. System as in claim 3 wherein said memory cell is implemented in PMOS.

11. System as in claim 3 wherein said second decoder simultaneously addresses one memory cell associated with substantially all of said display cells to display an image.

12. System as in claim 3 wherein said second decoder simultaneously addresses one memory cell associated with all of said display cells to display an image.

13. System as in claim 3 wherein said first decoder addresses a row of said array at a time.

14. A method of generating a three dimensional image in a true three dimensional display:

(a) receiving encoded video information and generating one or more voxels of said image;

(b) generating one or more planes of said image, each said plane representing a two dimensional slice of said image and including a plurality of said voxels;

(c) storing said one or more planes into a memory

(d) Sequentially writing predetermined portion of a plurality of said planes to said true three dimensional display; and

(e) forming a visible true three dimensional image in said true three dimensional display.

15. The method according to claim 14 wherein said forming step includes the step of simultaneously generating a plurality of energy beams.

16. The method according to claim 15 wherein said generating step includes the step of controlling a plurality of cells of a spatial light modulator.

17. The method according to claim 16 wherein said spatial light modulator includes mirror devices.