×

Method and apparatus for configuring and installing a loadable ABIOS device support layer in a computer system

  • US 5,446,898 A
  • Filed: 06/22/1992
  • Issued: 08/29/1995
  • Est. Priority Date: 06/22/1992
  • Status: Expired due to Term
First Claim
Patent Images

1. A personal computer system for making use of a logical memory space containing plural regions, each region containing multiple logical address locations;

  • said regions including at least a low region having discrete lower and upper address boundary limits, a high region having a lower address boundary limit, and an intermediate region located between said low and high regions;

    said intermediate region being traditionally used for storing firmware information for controlling said system;

    said firmware information including separate first and second portions of operating system microcode;

    said first portion being required by said system for completing a preliminary initialization enabling said system to handle application programs incapable of addressing said high region;

    said second portion being conditionally used by said system, after completion of said preliminary initialization, for enabling said system to handle application programs capable of addressing any of said regions;

    said personal computer system comprising;

    a data bus;

    a microprocessor electrically coupled to said data bus;

    said microprocessor operating in different first and second modes;

    said first mode restricting said microprocessor to address only said low and intermediate regions, and said second mode permitting said microprocessor to address any of said regions;

    non-volatile memory electrically coupled to the data bus, said non-volatile memory being accessible to said microprocessor via said data bus;

    said non-volatile memory storing said first portion of operating system microcode,said non-volatile memory storing request information indicating whether said system does or does not support loading into said computer system of a said second portion of operating system microcode from storage media not normally contained in said system;

    said request information being used only when the configuration of said system is initially established or altered to prompt a user of said system to provide access to said second portion of microcode on said storage media not normally contained in said system;

    volatile memory electrically coupled to the data bus, said volatile memory being accessible to said microprocessor via said data bus;

    said volatile memory being used to store linking information enabling said system to retrieve said second portion of operating system microcode while running under control of said first portion of operating system microcode;

    a memory controller electrically coupled to said data bus, said microprocessor, said volatile memory and said non-volatile memory, said memory controller regulating communications between said volatile memory, said non-volatile memory and said microprocessor;

    said memory controller translating logical addresses into physical addresses of storage locations in said volatile and non-volatile memories; and

    ,a direct access storage device electrically coupled to said data bus, said direct access storage device storing an image of said second portion of operating system microcode when said second portion of operating system microcode has been obtained from said media not contained in said system based upon said request information.

View all claims
  • 2 Assignments
Timeline View
Assignment View
    ×
    ×