Control architecture for ATM networks

• US 5,448,567 A
• Filed: 07/27/1993
• Issued: 09/05/1995
• Est. Priority Date: 07/27/1993
• Status: Expired due to Term

• Current Assignee: Juniper Networks Incorporated
• Original Assignee: NEC Research Institute, Inc. (NEC Corporation)
• Inventors: Ishii, Alexander T., Ramamurthy, Gopalakrishnan, Dighe, Rajiv
• Primary Examiner(s): Olms, Douglas W.
• Assistant Examiner(s): TON, DANG T
• Application Number:
  US08/097,683
• Time in Patent Office: 770 Days
• Field of Search: 370/94.2, 370/94.1, 370/60, 370/60.1, 370/17, 370/13, 370/84, 370/95.1, 370/82, 370/83, 377/44
• US Class Current: 370/233
• CPC Class Codes: H04L 12/5602 Bandwidth control in ATM Networks, e.g. leaky bucket
• CPC Class Codes: H04L 2012/5637 Leaky Buckets
• CPC Class Codes: H04L 2012/564 Connection-oriented
• CPC Class Codes: H04L 2012/5645 Connectionless
• CPC Class Codes: H04Q 11/0478 Provisions for broadband connections

Abstract

A control method and architecture is described for an ATM network carrying connectionless data traffic. The method is capable of integrating connection-oriented as well as connectionless traffic. The method takes advantage of the quasi-deterministic nature of the traffic emanating from a source that is being shaped by the leaky bucket shaping algorithm. Alternative methods are provided if such a shaping algorithm is not provided by the CPE which methods still guarantee performance that equals or exceeds shared media networks such as FDDI. Hardware and software embodiments of the methods are disclosed. The invention is particularly applicable to LANs and hubs.

Claims

1. A method of controlling a channel between a source and a destination in an ATM network, said channel having known traffic parameters of peak rate, sustained rate and compliant burst length, comprising the steps of:

shaping a burst of cells by transmitting cells up to said compliant burst length at said peak rate and then transmitting the remainder of said cells if any at said sustained rate, and

controlling said channel based upon said shaped burst of cells;

where Xⁱ is a residual bandwidth requirement from source i which is computed every cell time and ##EQU20## is the time interval equal to the amount of buffering in a queue, λ

_CBR is the capacity allocated to continuous bit rate (CBR) traffic on a channel, when ##EQU21## a new burst of cells is accepted, where X* is a new burst of cells, where B_Cⁱ is the remaining number of cells from a compliant burst of source i, T_Q is a slot length, X_CBR is a number of CBR cells arriving at the beginning of each slot, N is the number of active sources allowed to transmit, B_Q is the number of buffers λ

_pⁱ is the peak rate of the ith source and λ

_Dⁱ is the sustained rate of the ith source.

2. A method of controlling a channel between a source and a destination in an ATM networks, said channel having known traffic parameters of peak rate, sustained rate and compliant burst length, comprising the steps of:

shaping a burst of cells by transmitting cells up to said compliant burst length at said peak rate and then transmitting the remainder of said cells if any at said sustained rate, and

controlling said channel based upon said shaped burst of cells,

calculating, in an ATM network having a plurality of sources, the probability of each source providing a burst of cells having a burst length less than said compliant burst length;

assigning a probability ε

that a cell loss can result if a burst is accepted, and

said controlling said channel controlling based upon said calculated probability and said assigned probability.

3. A circuit for controlling a channel between a source and a destination in an ATM network comprising a plurality of sources., said channel having known parameters of peak rate, sustained rate and compliant burst length, comprising:

means for shaping at a source a burst of cells up to said compliant burst length at said peak rate and then transmitting remaining cells if any at said sustained rate;

means for summing residual bandwidth requirements from all sources and providing a sum value;

means for estimating a residual bandwidth remaining from said channel and updating said sum value;

means for summing said updated sum value, the bandwidth of a new burst of cells and a continuous bit rate residual bandwidth requirement for providing a summed value and when said summed value is less than or equal to the buffering associated with a destination, accepting said new burst of cells.

4. A circuit for controlling a channel between a source and a destination in an ATM network as set forth in claim 3, where said means for shaping comprises a RAM.

5. A circuit for controlling a channel between a source and a destination in an ATM network as set forth in claim 3, further comprising:

means for calculating the probability of each source providing a burst of cells having a burst length less than said compliant burst length;

means for assigning a probability ε

that a cell loss can result if a burst is accepted, and

said means for controlling said channel controlling based upon said calculated probability and said assigned probability.