Computer with alarm sounding apparatus having selectable output

• US 5,448,748 A
• Filed: 08/15/1994
• Issued: 09/05/1995
• Est. Priority Date: 08/30/1991
• Status: Expired due to Fees

• Current Assignee: Sanyo Electric Company Limited (Panasonic Holdings Corporation)
• Original Assignee: Sanyo Electric Company Limited (Panasonic Holdings Corporation)
• Inventors: Yawata, Masashi, Imaizumi, Yasukazu
• Primary Examiner(s): Harrell, Robert B.
• Assistant Examiner(s): VU, VIET DUY
• Application Number:
  US08/290,108
• Time in Patent Office: 386 Days
• Field of Search: 395/800, 395/725, 395/750, 340/509, 340/521, 340/636
• US Class Current: 700/80
• CPC Class Codes: G06F 1/28 Supervision thereof, e.g. detecting power-supply failure by out of limits supervision
• CPC Class Codes: G08B 23/00 Alarms responsive to unspecified undesired or abnormal conditions
• CPC Class Codes: G08B 29/181 due to failing power supply

Abstract

When a drop of the voltage of a battery is detected, a detector outputs two kinds of alarm signals in accordance with the degree of voltage drop. Two PALs for generating an alarm signal input the respective alarm signals to a selector. An alarm signal from another PAL which generates an alarm signal in accordance with the state of a panel switch and a sound signal from a speaker data generator which generates various sound signals in accordance with a signal from a CPU are also supplied to the selector. The selector selects one from these signals so as to drive a speaker. Since a means for generating an alarm signal is provided separately from the speaker data generator, an alarm sounding operation is ensured.

Claims

1. A computer having a speaker for outputting one of a plurality of different alarms and a system tone, said computer comprising:

speaker data generating means for generating a sounding signal for driving said speaker to produce said system tone in accordance with data supplied from a CPU;

alarm sounding condition detecting means for detecting a plurality of different predetermined alarm sounding conditions and outputting one of a plurality of different detection signals for each of said plurality of different predetermined alarm sounding conditions; and

alarm signal outputting means for receiving said one of said plurality of different predetermined alarm sounding detection signals supplied from said alarm sounding condition detecting means and said sounding signal from said speaker data generating means, and outputting said sounding signal from said speaker data generating means to produce said system tone when said one of said plurality of different detection signals is in a first state and outputting one of a plurality of alarm signals for driving said speaker to produce a corresponding one of the plurality of different alarms when said one of said plurality of different detection signals is in a second state.

2. The computer according to claim 1, wherein

said alarming signal outputting means is composed of a logic circuit;

said plurality of said detection signals from said alarm sounding condition detecting means are supplied to said logic circuit; and

said logic circuit selects and outputs one of said alarm signals in accordance with the states of said plurality of detection signals.

3. A computer having a CPU, a battery and a speaker for outputting one of a plurality of different alarms, comprising:

a sound signal generator that generates a a plurality of sound signals;

a low voltage battery detecting circuit that detects at least one low battery condition and outputs a separate low battery signal for each at least one low battery condition;

an open panel detecting circuit that produces an ON/OFF panel signal when a panel of the computer is open and the computer is in an on state;

at least one programmable array logic device receiving the ON/OFF panel signal and the at least one low battery signal for each at least one low battery condition, the at least one programmable array logic device outputs a plurality of alarm detection signals, each of the alarm detection signals corresponding to one of the ON/OFF panel signal and the at least one low battery signal;

a selector circuit receiving the plurality of alarm detection signals and the plurality of sound signals and outputting an alarm signal comprising one of the plurality of sound signals based on the plurality of alarm detection signals for driving the speaker to produce one of the plurality of different alarms.

4. The computer of claim 3, wherein the at least one programmable array logic device outputs a plurality of operational state signals, each of the operational state signals corresponding to one of the ON/OFF panel signal and the at least one low battery signal, and the selector circuit outputs one of the sounding signal and the detection signals on the basis of a state of each of the operational state signals.

5. The computer of claim 3, wherein the selector circuit outputs one of the plurality of sound signals and a CPU sound signal in accordance with a predetermined order of precedence when the plurality of alarm detection signals are simultaneously input to the selector circuit.

6. The computer according to claim 3, wherein the at least one programmable array logic device generates a predetermined silent period both at the start and at the end of sounding the alarm.

7. A computer speaker controller for controlling a computer speaker, comprising:

a detection circuit generating a plurality of detection signals;

a sound circuit generating a plurality of sound signals, each of the plurality of sound signals corresponding to one of the plurality of detection signals;

a speaker data generator generating a CPU sound signal to produce a system tone based on data supplied by a CPU; and

a controller circuit coupled to the detection circuit, the sound circuit and the speaker data generator controlling the computer speaker, the controller circuit driving the computer speaker based on the detection signals to produce one of a plurality of sounds corresponding to each of the plurality of detection signals.

8. The computer speaker controller of claim 7, wherein the controller circuit includes:

an alarm detection signal generator, generating a plurality of alarm detection signals based on the detection signals of the detection circuit; and

an alarm priority circuit selecting one of the plurality of sound signals from the sound circuit as an alarm signal and the CPU sound signal based on the alarm detection signals generated by the alarm detection signal generator.

9. The computer speaker controller of claim 7, wherein the sound circuit includes:

a tone generator generating a tone signal; and

a plurality of tone pattern generators coupled to the tone generator, each tone pattern generator producing a unique time pattern of a first preset duration of the tone signal and a second preset duration of silence.

10. The computer speaker controller according to claim 7, wherein:

said detection circuit detects the voltage of a battery, outputting a first detection signal when said voltage drops below a first threshold value, and outputting a second detection signal when said voltage drops below a second threshold value; and

said detection circuit further detects an ON/OFF state of a panel switch, which represents an open/closed state of a panel, and outputs a third detection signal indicating said ON/OFF state.

11. The computer speaker controller according to claim 8, wherein said alarm signal output from said alarm priority circuit produces a predetermined silent period both at the start and at the end of a corresponding alarm.

12. The computer speaker controller according to claim 8, wherein said alarm priority circuit selects one of the plurality of sound signals and a CPU sound signal in accordance with a predetermined order of precedence when more than one of the plurality of the detection signals are simultaneously generated.

13. The computer speaker controller according to claim 8, wherein the alarm signal generator includes at least one programmable array logic device.

14. The computer speaker controller according to claim 13, wherein the at least one programmable array logic device outputs the plurality of alarm detection signals.

15. The computer speaker controller according to claim 14, wherein the alarm priority circuit comprises a selector circuit, the selector circuit receiving the plurality of alarm detection signals generated by the alarm detection signal generator and the plurality of sound signals generated by the sound circuit and outputting one of the plurality of sound signals and the CPU sound signal to the computer speaker.