Apparatus and method for operating a phase locked loop frequency synthesizer responsive to radio frequency channel spacing

• US 5,448,763 A
• Filed: 11/09/1993
• Issued: 09/05/1995
• Est. Priority Date: 11/09/1993
• Status: Expired due to Term

• Current Assignee: Google Technology Holdings LLC (Alphabet Inc.)
• Original Assignee: Motorola, Inc. (Motorola Solutions, Inc.)
• Inventors: Gillig, Steven F.
• Primary Examiner(s): Urban, Edward F.
• Assistant Examiner(s): FAILE, ANDREW I
• Application Number:
  US08/149,677
• Time in Patent Office: 665 Days
• Field of Search: 455/76-77, 455/120, 455/260, 455/266, 455/343, 379/59, 331/17, 331/25, 328/155, 375/81, 375/120
• US Class Current: 455/76
• CPC Class Codes: H03L 7/093 using special filtering or amplification characteristics in the loop H03L7/087 - H03L7/091 take precedence
• CPC Class Codes: H03L 7/18 using a frequency divider or counter in the loop H03L7/20, H03L7/22 take precedence

Abstract

An apparatus and method for operating a phase locked loop frequency synthesizer responsive to radio frequency channel spacing. The phase locked loop (PLL) frequency synthesizer (300) tunes a radio frequency transceiver (100) to a radio frequency channel. A processor (110) in the transceiver (100) determines the channel spacing of the radio frequency channels in a portion of a radio frequency band including the radio frequency channel, and controls the PLL frequency synthesizer (300) responsive to the determined channel spacing. The present invention advantageously provides the PLL frequency synthesizer (300) with faster lock time and lower noise.

Claims

1. In a radio frequency transceiver operating in a radio frequency band including a plurality of radio frequency channels, wherein channel spacing is defined as a difference in frequency between two adjacent channels of the radio frequency band, wherein the channel spacing varies over the radio frequency band, wherein the radio frequency transceiver includes a phase locked loop (PLL) frequency synthesizer operative to tune the radio frequency transceiver to a radio frequency channel in the radio frequency band and operative to generate an output frequency signal, wherein the PLL frequency synthesizer has an adjustable loop bandwidth, a method for operating the PLL frequency synthesizer comprising the steps of:

determining the channel spacing of the radio frequency channels in a portion of the radio frequency band including the radio frequency channel; and

adjusting the loop bandwidth of the PLL frequency synthesizer responsive to the determined channel spacing.

2. A method according to claim 1 further comprising the step of operating the PLL frequency synthesizer in continuous and discontinuous modes responsive to first and second determined channel spacings, respectively.

3. A method according to claim 2 wherein the first determined channel spacing is less than the second determined channel spacing.

4. A method according to claim 2 further comprising the step of:

adjusting the resolution of the PLL frequency synthesizer responsive to the first and second determined channel spacings, wherein the resolution is defined by a minimum allowable change in the frequency of the output frequency signal.

5. A method according to claim 1 further comprising the step of:

adjusting the resolution of the PLL frequency synthesizer responsive to the determined channel spacing, wherein the resolution is defined by a minimum allowable change in the frequency of the output frequency signal.

6. In a radio frequency transceiver operating in a radio frequency band including a plurality of radio frequency channels, wherein channel spacing is defined as a difference in frequency between two adjacent channels of the radio frequency band, wherein the channel spacing varies over the radio frequency band, wherein the radio frequency transceiver includes a phase locked loop (PLL) frequency synthesizer operative to tune the radio frequency transceiver to a radio frequency channel in the radio frequency band and operative to generate an output frequency signal, wherein the PLL frequency synthesizer has an adjustable loop bandwidth, an apparatus for operating the PLL frequency synthesizer comprising:

a processor operative to determine the channel spacing of the radio frequency channels in a portion of the radio frequency band including the radio frequency channel; and

operative to adjust the loop bandwidth of the PLL frequency synthesizer responsive to the determined channel spacing.