Dual standard RF-ID system
First Claim
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1. A dual standard RF-ID protocal system, which can receive and recognize FDX(FSK), HDX(FSK) and FDX(ASK) transponders comprising:
- a first antenna circuit for transmitting an excitation pulse to charge-up HD transponders and immediately initiate the FD transponders to respond;
a second antenna circuit for receiving a transponders RF frequency response signal;
a mixer circuit which mixes the transponder RF frequency signal with one LO frequency signal and yields a predetermined IF frequency signal;
an amplifier circuit for amplifying said IF frequency signal and comprising a signal-detect circuit which detects the presence or absence of an FDX(FSK) signal being received;
an amplitude limiting circuit for amplitude limiting said IF frequency signal; and
a demodulator circuit for demodulation of said IF frequency signal into a train of pulses having different amplitudes and constant width comprising;
a zero detector circuit for detecting the number of zero crossings in a predetermined amount of time,a timer for defining said predetermined time for said zero detector circuit, andwherein said amplitude of said pulses is dependent upon said number of detected zero crossings.
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Abstract
An object of the invention is to provide a reader which can read transponders having different communication standard protocols with a minimum loss of demodulation speed performance and with the least amount of additional components.
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Citations
3 Claims
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1. A dual standard RF-ID protocal system, which can receive and recognize FDX(FSK), HDX(FSK) and FDX(ASK) transponders comprising:
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a first antenna circuit for transmitting an excitation pulse to charge-up HD transponders and immediately initiate the FD transponders to respond; a second antenna circuit for receiving a transponders RF frequency response signal; a mixer circuit which mixes the transponder RF frequency signal with one LO frequency signal and yields a predetermined IF frequency signal; an amplifier circuit for amplifying said IF frequency signal and comprising a signal-detect circuit which detects the presence or absence of an FDX(FSK) signal being received; an amplitude limiting circuit for amplitude limiting said IF frequency signal; and a demodulator circuit for demodulation of said IF frequency signal into a train of pulses having different amplitudes and constant width comprising; a zero detector circuit for detecting the number of zero crossings in a predetermined amount of time, a timer for defining said predetermined time for said zero detector circuit, and wherein said amplitude of said pulses is dependent upon said number of detected zero crossings. - View Dependent Claims (2, 3)
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Specification