DMD display system

• US 5,452,024 A
• Filed: 11/01/1993
• Issued: 09/19/1995
• Est. Priority Date: 11/01/1993
• Status: Expired due to Term

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: Sampsell, Jeffrey B.
• Primary Examiner(s): Groody, James J.
• Assistant Examiner(s): LEE, MICHAEL
• Application Number:
  US08/146,385
• Time in Patent Office: 687 Days
• Field of Search: 348/755, 348/750, 348/764, 348/770, 348/771, 348/772, 348/773, 348/774, 348/775, 348/765, 348/739, 348/742, 348/743, 348/744, 348/756, 348/757, 348/758, 348/759, 348/760
• US Class Current: 348/755
• CPC Class Codes: G02B 26/0841 the reflecting element being moved or deformed by electrostatic means
• CPC Class Codes: G09G 3/2022 using sub-frames
• CPC Class Codes: G09G 3/2092 Details of a display terminals using a flat panel, the details relating to the control arrangement of the display terminal and to the interfaces thereto suitable for both CRT and flat panel G09G5/003; specific for a CRT G09G1/165
• CPC Class Codes: G09G 3/346 based on modulation of the reflection angle, e.g. micromirrors micromirrors devices per se G02B26/0833
• CPC Class Codes: H04N 5/7458 the modulator being an array of deformable mirrors, e.g. digital micromirror device [DMD]
• CPC Class Codes: H04N 9/3117 by using a sequential colour filter producing two or more colours simultaneously, e.g. by creating scrolling colour bands
• CPC Class Codes: H04N 9/312 Driving therefor driving of electronic spatial light modulators in displays other than projection devices G09G3/34, G09G3/36; control of liquid crystal elements G02F1/133; control of micromechanical modulators G02B26/08

Abstract

A digital video display system (100). The system receives digital data from either broadcast video (102) or an alternate source (107), in either analog or digital form. The system processes the data into display data and loads the data onto a digital micromirror device (112). The data is either formatted for color-sequencing or separated into color data for separate devices. The data causes the individual cells on the device to respond and then they are illuminated. The light coming from deflected cells is displayed on a display surface.

Claims

1. A display system comprising:

a. a source of digitized video data, wherein said source decodes an incoming signal to locate image information and recognize any format of said data;

b. a video memory for receiving said image information in said format from said source;

c. a signal processor for receiving said image information from said video memory and processing said information for display, wherein said processor is operable to perform interlace to progressive scan conversion;

d. a buffer memory for receiving said processed information from said processor;

e. at least one digital micromirror device for receiving said processed information from said buffer memory, each said device including an array of individually addressable cells and addressing circuitry, wherein said addressing circuitry receives said processed information for said individually addressable cells such that each of said individually addressable cells responds to said processed information;

f. at least one light source for illuminating said individual cells during the interval when said individual cells are responding to said addressing information; and

g. optics such that light reflected from those said individual cells receiving information operative to change the angle of deflection of said cell is captured and focused on a display surface.

2. The system of claim 1 wherein said source of digital video data further comprises a receiver, a tuner and a digitizer.

3. The system of claim 1 wherein said source of digital video data further comprises a receiver and a tuner.

4. The system of claim 1 wherein said source of digital video data is a non-broadcast analog video source.

5. The system of claim 1 wherein said source of digital video data is a non-broadcast digital video source.

6. The system of claim 1 wherein said buffer memory comprises at least one first-in-first-out buffer.

7. The system of claim 1 wherein said buffer memory is operative to perform a pixel-plane to bit-plane reformatting.

8. The system of claim 1 wherein said buffer memory comprises at least one random-access memory.

9. The system of claim 8 wherein said buffer memory comprises at least one video random-access memory.

10. The system of claim 8 wherein said buffer memory comprises at least one frame random-access memory.

11. The system of claim 1 wherein said at least one digital micromirror device further comprises two digital micromirror devices, one for receiving two of either red, green or blue, and one for receiving the remaining color.

12. The system of claim 1 wherein said at least one digital micromirror device further comprises three digital micromirror devices, one for receiving red light, one for receiving blue light and one for receiving green light.

13. The system of claim 1 wherein said buffer memory, said addressing circuitry and said array of individual cells are all contained on one substrate.

14. The system of claim 1 wherein the on-state of each mirror is set coincident with a series of pulses, one for each bit of digital intensity level, wherein each said pulse has a temporal length proportional to each bit'"'"'s weighting of said digital intensity level.

15. A display system comprising:

a. a source of digitized video data, wherein said source decodes an incoming signal to locate image information and any format within said data;

b. a video memory for receiving said image information in said format from said source;

c. a signal processor for receiving said image information from said video memory and processing said image information for display, wherein said processor is operable to perform interlace to progressive scan conversion;

d. a buffer memory for receiving said processed information from said processor;

e. a digital micromirror device for receiving said processed information from said buffer memory, each said device including an array of individually addressable cells and addressing circuitry, wherein said addressing circuitry receives said processed information for said individually addressable cells such that each of said individually addressable cells responds to said processed information;

f. a light source for illuminating said individual cells during the interval when said individual cells are responding to said addressing information, wherein said light source sequences red, green and blue light onto said individual cells; and

g. optics such that light reflected from those said individual cells receiving information operative to change the angle of deflection of said cell is captured and focused on a display surface.

16. The system of claim 15 wherein said source of digital video data further comprises a receiver, a tuner and a digitizer.

17. The system of claim 15 wherein said source of digital video data further comprises a receiver and a tuner.

18. The system of claim 15 wherein said source of digital video data is a non-broadcast analog video source.

19. The system of claim 15 wherein said source of digital video data is a non-broadcast digital video source.

20. The system of claim 15 wherein said buffer memory comprises at least one first-in-first-out buffer.

21. The system of claim 15 wherein said buffer memory comprises at least one random-access memory.

22. The system of claim 21 wherein said buffer memory comprises at least one video random-access memory.

23. The system of claim 21 wherein said buffer memory comprises at least one frame random-access memory.

24. The system of claim 15 wherein said at least one digital micromirror device further comprises two digital micromirror devices, one for receiving two of either red, green or blue, and one for receiving the remaining color.

25. The system of claim 15 wherein said at least one digital micromirror device further comprises three digital micromirror devices, one for receiving red light, one for receiving blue light and one for receiving green light.

26. The system of claim 15 wherein said buffer memory, said addressing circuitry and said array of individual cells are all contained on one substrate.