Sense amplifier with positive feedback and self-biasing to achieve full voltage swing

• US 5,453,704 A
• Filed: 10/29/1993
• Issued: 09/26/1995
• Est. Priority Date: 10/30/1992
• Status: Expired due to Term

• Current Assignee: Fujitsu Limited
• Original Assignee: Fujitsu Limited
• Inventors: Kawashima, Shoichiro
• Primary Examiner(s): Westin, Edward P.
• Assistant Examiner(s): CALOGERO, STEPH
• Application Number:
  US08/142,928
• Time in Patent Office: 697 Days
• Field of Search: 307/475, 307/451, 307/548, 307/272.1, 307/496, 330/293, 330/98, 330/99, 330/100, 326/80, 326/81, 326/31, 326/34, 327/51, 327/312, 327/185, 327/65
• US Class Current: 326/81
• CPC Class Codes: H03K 19/01806 Interface arrangements
• CPC Class Codes: H03K 19/018521 of complementary type, e.g. CMOS

Abstract

A level shift amplifier has first to n th inverters connected in series, with each positive voltage terminal of the first to n th inverter is connected to the first source line. Each negative voltage terminal of the first to (n-2)th inverter is connected to output of the second next inverter, respectively. The negative voltage terminal of the (n-1)th inverter is connected to a part of the output of the n th inverter, and the negative voltage terminal of the n th inverter is connected to the second source line. n pieces of feedback elements are connected between the input and output of each inverter. When a feedback element is established so that the gain of each inverter can be maximized, a self-bias amplifier circuit is composed. All inverters are driven by the self-bias voltage. The fine amplitude signals input to the first inverter become the output voltage of full amplitude between the first and second source lines in the n-th inverter. Also, a positive feedback circuit is composed, and the amplification factor of the level shift amplifier is enhanced.

Claims

1. A level shift amplifier comprising:

(a) first to n th inverters connected in cascade,

(1) each positive voltage terminal of the first to n th inverter is connected to a first source line,

(2) each negative voltage terminal of the first to (n-2)th inverter is connected to output of the second next adjacent inverter respectively,

(3) the negative voltage terminal of the (n-1)th inverter is connected to a voltage divider receiving output of the n th inverter, and

(4) the negative voltage terminal of the n th inverter is connected to a second source line; and

(b) n feedback elements connected between the input and output of each inverter and in cascade to each other.

2. A level shift amplifier according to claim 1, wherein said first to (n-2)th inverters include a low pass filter circuit between the negative voltage terminal and the output of the second next adjacent inverter respectively.

3. A level shift amplifier according to claim 1, wherein said (n-1)th inverter include a low pass filter circuit between the negative voltage terminal and the voltage divider receiving output of the n th inverter.

4. A level shift amplifier according to claim 1, wherein said inverters each include:

a p type field effect transistor and an n type field effect transistor.

5. A level shift amplifier according to claim 1, wherein said inverters each include:

a pnp type bipolar transistor and an npn type bipolar transistor.

6. A level shift amplifier comprising:

(a) a first cascade of first to n th inverters connected in cascade and first inverter receiving a first signal,

(1) each positive voltage terminal of the first to n th inverter connected to a first source line,

(2) each negative voltage terminal of the first to (n-2)th inverter is connected to negative voltage terminal of the first to (n-2)th inverter respectively, in which is connected to a voltage divider receiving output of the second next inverter respectively,

(3) the negative voltage terminal of the (n-1)th inverter is connected to the negative voltage terminal of the (n-1)th inverter which is connected to a voltage divider receiving output of the n th inverter at the positive sequence side and the negative sequence side, and

(4) the negative voltage terminal the n th inverter at the positive sequence side is connected to the second source line;

(b) a second cascade of first to n th inverters connected in cascade and first inverter receiving complement of first signal,

(1) each positive voltage terminal of the first to n th inverter is connected to the first source line,

(2) each negative voltage terminal of the first to (n-2)th inverter is connected to negative voltage terminal of the first to (n-2)th inverter respectively, in which is connected to a part of the output of the second next inverter respectively,

(3) the negative voltage terminal of the (n-1)th inverter is connected to the negative voltage terminal of the (n-1)th inverter which is connected to a part of the output of the n th inverter, and

(4) the negative voltage terminal of the n th inverter is connected to the second source line;

(c) n pieces of feedback elements are connected between the input and output of each inverter; and

(d) n pieces of feedback elements are connected between the input and output of each inverter.

7. A level shift amplifiers according to claim 6, wherein said first to (n-2)th inverters include a low pass filter circuit between the junction of the negative voltage terminal and the voltage divider receiving output of the second next inverter respectively.

8. A level shift amplifier according to claim 6, wherein said (n-1)th inverter includes a low pass filter circuit between the junction of the negative voltage terminal and a part of the output of the n th inverter.

9. A level shift amplifier according to claim 6, wherein each of said inverters include:

p type field effect transistors and n type field effect transistors.

10. A level shift amplifier according to claim 6, wherein each of said inverters include:

pnp type bipolar transistors and npn type bipolar transistors.