Method of making a vertical channel device using buried source techniques

• US 5,455,190 A
• Filed: 12/07/1994
• Issued: 10/03/1995
• Est. Priority Date: 12/07/1994
• Status: Expired due to Fees

• Current Assignee: United Microelectronics Corporation
• Original Assignee: United Microelectronics Corporation
• Inventors: Hsu, Chen-Chung
• Primary Examiner(s): CHAUDHARI, CHANDRA P
• Application Number:
  US08/351,492
• Time in Patent Office: 300 Days
• Field of Search: 437/26, 437/38, 437/40, 437/192, 437/203, 148/DIG. 50
• US Class Current: 438/270
• CPC Class Codes: H01L 29/66666 Vertical transistors H01L29/66712, H01L29/66742 take precedence
• CPC Class Codes: H01L 29/7827 Vertical transistors H01L29/7802, H01L29/78642 take precedence

Abstract

A new method of manufacturing a vertical channel device integrated circuit is described. A structure is provided comprising a semiconductor substrate having a first conductivity type, a buried source region having a second opposite conductivity type, and an epitaxial layer of the second conductivity type having a lower dopant concentration than the buried source region. Field oxide regions are formed at outer edges of the epitaxial layer. A well region of first conductivity type is implanted into the central portion of the epitaxial layer to define the active area. Trenches are etched through the well region into the buried source region. A first layer of silicon oxide is grown on the surface and within the trenches. Gate electrodes are formed by depositing a layer of polysilicon and etching back to leave the polysilicon layer only within the trenches. Ions of second conductivity type are implanted into the top portion of the well region to form drain regions. A second layer of silicon oxide is deposited over the top surfaces and planarized. Contact trenches are etched through the second silicon oxide layer and the field oxide regions to connect to the buried source region. A second set of contact trenches are etched through portions of the second silicon oxide layer to the underlying drain regions. A layer of tungsten is deposited and etched back leaving the tungsten within the first and second trenches. Interconnections are made between the source and drain regions to complete the fabrication.

Claims

1. The method of manufacturing a vertical channel device comprising:

providing a structure comprising a semiconductor substrate having a first conductivity type, a buried source region having a second conductivity type opposite to said first conductivity type and a first dopant concentration formed on top of said semiconductor substrate, and an epitaxial layer of said second conductivity type having a second dopant concentration formed on the surface of said buried source region wherein the second dopant concentration is less than the first dopant concentration;

forming field oxide regions in and on the surface of said epitaxial layer;

implanting to form a well region of said first conductivity type into said epitaxial layer between said field oxide regions wherein said well region defines an active area of said vertical channel device;

etching through said well region into the underlying buried source region where said well region is not covered by a mask leaving trenches within said active region;

thermally growing a first layer of silicon oxide conformally on the surface of said well region and within said trenches;

forming a gate electrode by depositing a layer of polysilicon over the surface of said well region and within said trenches and etching back said polysilicon layer leaving said polysilicon layer only within said trenches;

covering said trenches with a photoresist mask;

implanting ions of said second conductivity type into the top portion of said well region not covered by said photoresist mask to form drain regions within said well region and between said trenches;

depositing a second layer of silicon oxide over the surface of said well region and said field oxide regions and planarizing said second silicon oxide layer;

etching through a portion of said second silicon oxide layer and underlying field oxide regions not covered by a mask to the underlying epitaxial layer to connect to said buried source region leaving first contact trenches through said second silicon oxide layer and said field oxide regions;

etching through portions of said second silicon oxide layer not covered by a mask to the underlying drain regions leaving second contact trenches through said second silicon oxide layer;

depositing tungsten within said first and second contact trenches; and

interconnecting said source and drain regions to complete the fabrication of said vertical channel device.

2. The method of claim 1 wherein said vertical channel device is an NMOS device and wherein said first conductivity type is P and said second conductivity type is N.

3. The method of claim 1 wherein said vertical channel device is a PMOS device and wherein said first conductivity type is N and said second conductivity type is P.

4. The method of claim 2 wherein said buried source region is formed by implanting arsenic ions with a dosage of between about 1 E 15 to 1 E 16 atoms/cm² and an energy of between about 50 to 100 KeV.

5. The method of claim 3 wherein said buried source region is formed by implanting BF₂ ions with a dosage of between about 1 E 15 to 1 E 16 atoms/cm2 and an energy of between about 50 to 100 KeV.

6. The method of claim 1 wherein said epitaxial layer is formed to a thickness of between about 2000 to 4000 Angstroms.

7. The method of claim 2 wherein said well region is a P-well formed by implanting boron ions at a dosage of between about 5 E 12 to 5 E 13 atoms/cm² and an energy of between about 100 to 200 KeV.

8. The method of claim 3 wherein said well region is an N-well formed by implanting phosphorus ions at a dosage of between about 1 E 12 to 1 E 13 atoms/cm² and an energy of between about 100 to 200 KeV.

9. The method of claim 2 wherein said drain regions are formed by implanting arsenic ions at a dosage of between about 1 E 15 to 1 E 16 atoms/cm² and an energy of between about 50 to 100 KeV.

10. The method of claim 3 wherein said drain regions are formed by implanting BF₂ ions at a dosage of between about 1 E 15 to 1 E 16 atoms/cm² and an energy of between about 50 to 100 KeV.

11. The method of claim 1 wherein said first contact trenches for connection to said buried source region extend through said field oxide regions and the underlying epitaxial layer to said buried source region.

12. The method of claim 1 wherein said first contact trenches for connection to said buried source region extend through said field oxide regions to the underlying epitaxial layer and wherein an implant of the same conductivity type as said buried source region is made through said first contact trenches and driven in to contact said buried source region.

13. The method of claim 12 wherein said second conductivity type is N and wherein said implant of the same conductivity type comprises phosphorus ions implanted at a dosage of between about 5 E 15 to 5 E 16 atoms/cm² and an energy of between about 100 to 200 KeV.

14. The method of claim 12 wherein said second conductivity type is P and wherein said implant of the same conductivity type comprises BF₂ ions implanted at a dosage of between about 5 E 15 to 5 E 16 atoms/cm² and an energy of between about 100 to 200 KeV.

15. The method of manufacturing a vertical channel device comprising:

implanting ions into a semiconductor substrate having a first conductivity type to provide a buried source region having a second conductivity type opposite to said first conductivity type and having a first dopant concentration;

forming an epitaxial layer of said second conductivity type having a dopant concentration on the surface of said buried source region wherein the dopant concentration of said epitaxial layer is less than the first dopant concentration;

forming field oxide regions in and on the surface of said epitaxial layer;

implanting to form a well region of said first conductivity type into said epitaxial layer between said field oxide regions wherein said well region defines an active area of said vertical channel device;

etching through said well region into the underlying buried source region where said well region is not covered by a mask leaving trenches within said active region;

thermally growing a first layer of silicon oxide conformally on the surface of said well region and within said trenches;

depositing a layer of polysilicon over the surface of said well region and within said trenches and etching back said polysilicon layer leaving said polysilicon layer only within said trenches;

covering said trenches with a photoresist mask;

implanting ions of said second conductivity type into the top portion of said well region not covered by said photoresist mask to form drain regions within said well region and between said trenches;

depositing a second layer of silicon oxide over the surface of said well region and said field oxide regions and planarizing said second silicon oxide layer;

etching through a portion of said second silicon oxide layer and underlying field oxide regions not covered by a mask to the underlying epitaxial layer to connect to said buried source region leaving first contact trenches through said second silicon oxide layer and said field oxide regions;

etching through portions of said second silicon oxide layer not covered by a mask to the underlying drain regions second contact trenches through said second silicon oxide layer;

depositing tungsten within said first and second contact trenches; and

interconnecting said source and drain regions to complete the fabrication of said vertical channel device.

16. The method of claim 15 wherein said vertical channel device is an NMOS device and wherein said first conductivity type is P and said second conductivity type is N.

17. The method of claim 15 wherein said vertical channel device is a PMOS device and wherein said first conductivity type is N and said second conductivity type is P.

18. The method of claim 16 wherein said buried source region is formed by implanting arsenic ions with a dosage of between about 1 E 15 to 1 E 16 atoms/cm² and an energy of between about 50 to 100 KeV.

19. The method of claim 17 wherein said buried source region is formed by implanting BF₂ ions with a dosage of between about 1 E 15 to 1 E 16 atoms/cm² and an energy of between about 50 to 100 KeV.

20. The method of claim 15 wherein said epitaxial layer has a thickness of between about 2000 to 4000 Angstroms.

21. The method of claim 16 wherein said well region is a P-well formed by implanting boron ions at a dosage of between about 5 E 12 to 5 E 13 atoms/cm² and an energy of between about 100 to 200 KeV.

22. The method of claim 17 wherein said well region is an N-well formed by implanting phosphorus ions at a dosage of between about 1 E 12 to 1 E 13 atoms/cm² and an energy of between about 100 to 200 KeV.

23. The method of claim 16 wherein said drain regions are formed by implanting arsenic ions at a dosage of between about 1 E 15 to 1 E 16 atoms/cm² and an energy of between about 50 to 100 KeV.

24. The method of claim 17 wherein said drain regions are formed by implanting BF₂ ions at a dosage of between about 1 E 15 to 1 E 16 atoms/cm² and an energy of between about 50 to 100 KeV.

25. The method of claim 15 wherein said first contact trenches extend through said field oxide regions and the underlying epitaxial layer to said buried source region.

26. The method of claim 15 wherein said first contact trenches extend through said field oxide regions to the underlying epitaxial layer and wherein an implant of the same conductivity type as said buried source region is made through said first contact trenches and driven in to contact said buried source region.

27. The method of claim 26 wherein said second conductivity type is N and wherein said implant of the same conductivity type comprises phosphorus ions implanted at a dosage of between about 5 E 15 to 5 E 16 atoms/cm² and an energy of between about 100 to 200 KeV.

28. The method of claim 26 wherein said second conductivity type is P and wherein said implant of the same conductivity type comprises BF₂ ions implanted at a dosage of between about 5 E 15 to 5 E 16 atoms/cm² and an energy of between about 100 to 200 KeV.

29. The method of manufacturing an NMOS vertical channel device comprising:

providing a structure comprising a P-type semiconductor substrate, an N+ buried source region formed on top of said semiconductor substrate, and an N-epitaxial layer formed on the surface of said N+ buried source region;

forming field oxide regions in and on the surface of said epitaxial layer;

implanting to form a P-well into said epitaxial layer between said field oxide regions wherein said P-well defines an active area of said vertical channel device;

etching through said P-well into the underlying N+ buried source region where said P-well is not covered by a mask leaving trenches within said active region;

thermally growing a first layer of silicon oxide conformally on the surface of said P-well and within said trenches;

forming a gate electrode by depositing a layer of polysilicon over the surface of said P-well and within said trenches and etching back said polysilicon layer leaving said polysilicon layer only within said trenches;

covering said trenches with a photoresist mask;

implanting N+ ions into the top portion of said P-well not covered by said photoresist mask to form drain regions within said P-well;

depositing a second layer of silicon oxide over the surface of said P-well and said field oxide regions and planarizing said second silicon oxide layer;

etching through a portion of said second silicon oxide layer and underlying field oxide regions not covered by a mask to the underlying epitaxial layer to connect to said N+ buried source region leaving first contact trenches through said second silicon oxide layer and said field oxide regions;

etching through portions of said second silicon oxide layer not covered by a mask to the underlying drain regions leaving second contact trenches through said second silicon oxide layer;

depositing tungsten within said first and second contact trenches; and

interconnecting said source and drain regions to complete the fabrication of said NMOS vertical channel device.

30. The method of claim 29 wherein said N+ buried source region is formed by implanting arsenic ions with a dosage of between about 1 E 15 to 1 E 16 atoms/cm² and an energy of between about 50 to 100 KeV.

31. The method of claim 29 wherein said epitaxial layer has a thickness of between about 2000 to 4000 Angstroms.

32. The method of claim 29 wherein said P-well is formed by implanting boron ions at a dosage of between about 5 E 12 to 5 E 13 atoms/cm² and an energy of between about 100 to 200 KeV.

33. The method of claim 29 wherein said drain regions are formed by implanting arsenic ions at a dosage of between about 1 E 15 to 1 E 16 atoms/cm² and an energy of between about 50 to 100 KeV.

34. The method of claim 29 wherein said first contact trenches extend through said field oxide regions and the underlying epitaxial layer to said N+ buried source region.

35. The method of claim 29 wherein said first contact trenches extend through said field oxide regions to the underlying epitaxial layer and wherein an N+ implant is made through said first contact trenches and driven in to contact said N+ buried source region.

36. The method of claim 35 wherein said N+ implant comprises phosphorus ions implanted at a dosage of between about 5 E 15 to 5 E 16 atoms/cm² and an energy of between about 100 to 200 KeV.

37. The method of manufacturing a PMOS vertical channel device comprising:

providing a structure comprising an N-type semiconductor substrate, a P+ buried source region formed on top of said semiconductor substrate, and a P-epitaxial layer formed on the surface of said P+ buried source region;

forming field oxide regions in and on the surface of said epitaxial layer;

implanting to form an N-well into said epitaxial layer between said field oxide regions wherein said N-well defines an active area of said vertical channel device;

etching through said N-well into the underlying N+ buried source region where said N-well is not covered by a mask leaving trenches within said active region;

thermally growing a first layer of silicon oxide conformally on the surface of said N-well and within said trenches;

forming a gate electrode by depositing a layer of polysilicon over the surface of said N-well and within said trenches and etching back said polysilicon layer leaving said polysilicon layer only within said trenches;

covering said trenches with a photoresist mask;

implanting P+ ions into the top portion of said N-well not covered by said photoresist mask to form drain regions within said N-well;

depositing a second layer of silicon oxide over the surface of said N-well and said field oxide regions and planarizing said second silicon oxide layer;

etching through a portion of said second silicon oxide layer and underlying field oxide regions not covered by a mask to the underlying epitaxial layer to connect to said P+ buried source region leaving first contact trenches through said second silicon oxide layer and said field oxide regions;

etching through portions of said second silicon oxide layer not covered by a mask to the underlying drain regions leaving second contact trenches through said second silicon oxide layer;

depositing tungsten within said first and second contact trenches; and

interconnecting said source and drain regions to complete the fabrication of said PMOS vertical channel device.

38. The method of claim 37 wherein said P+ buried source region is formed by implanting BF₂ ions with a dosage of between about 1 E 15 to 1 E 16 atoms/cm² and an energy of between about 50 to 100 KeV.

39. The method of claim 37 wherein said epitaxial layer has a thickness of between about 2000 to 4000 Angstroms.

40. The method of claim 37 wherein said N-well is formed by implanting phosphorus ions at a dosage of between about 1 E 12 to 1 E 13 atoms/cm² and an energy of between about 100 to 200 KeV.

41. The method of claim 37 wherein said drain regions are formed by implanting BF₂ ions at a dosage of between about 1 E 15 to 1 E 16 atoms/cm² and an energy of between about 50 to 100 KeV.

42. The method of claim 37 wherein said first contact trenches extend through said field oxide regions and the underlying epitaxial layer to said P+ buried source region.

43. The method of claim 37 wherein said first contact trenches extend through said field oxide regions to the underlying epitaxial layer and wherein a P+ implant is made through said first contact trenches and driven in to contact said P+ buried source region.

44. The method of claim 43 wherein said P+ implant comprises BF₂ ions implanted at a dosage of between about 5 E 15 to 5 E 16 atoms/cm² and an energy of between about 100 to 200 KeV.