Modified bang-bang phase detector with ternary output
First Claim
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1. A method for controlling a dock generator comprising:
- generating a dock signal;
receiving a data signal from an external circuit;
generating a first signal when a transition edge of said clock signal occurs after a transition edge of said data signal;
generating a second signal when said transition edge of said clock signal occurs before said transition edge of said data signal; and
generating a third signal when said data signal remains in a same signal state for at least two transition edges of a same type of said dock signal.
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Abstract
A phase detector is described. The phase detector receives a data signal from an external circuit. The phase detector generates a first signal when a transition edge of the dock signal occurs after a transition edge of the data signal. The phase detector generates a second signal when the transition edge of the dock signal occurs before the transition edge of the data signal and generates a third signal when the data signal remains in a same signal state for at least two transition edges of a same type of the dock signal.
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Citations
27 Claims
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1. A method for controlling a dock generator comprising:
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generating a dock signal; receiving a data signal from an external circuit; generating a first signal when a transition edge of said clock signal occurs after a transition edge of said data signal; generating a second signal when said transition edge of said clock signal occurs before said transition edge of said data signal; and generating a third signal when said data signal remains in a same signal state for at least two transition edges of a same type of said dock signal. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A phase detector for indicating phase comprising:
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a data input allowing said phase detector to receive a data signal from a data signal source; a dock input allowing said phase detector to receive a clock signal from a dock signal source; first circuitry coupled to said data input and said clock input operable to indicate a transition edge of said data signal; and second circuitry coupled to said data input and said dock input operable to indicate a position of said transition edge of said data signal relative to a transition edge of said dock signal. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16)
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17. An apparatus for controlling a dock generator comprising:
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means for generating a clock signal; means for receiving a data signal from an external circuit; means for generating a first signal when a transition edge of said clock signal occurs after a transition edge of said data signal; means for generating a second signal when said transition edge of said dock signal occurs before said transition edge of said data signal; and means for generating a third signal when said data signal remains in a same signal state for at least two transition edges of a same type of said clock signal. - View Dependent Claims (18)
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19. A phase-locked loop circuit comprising:
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a clock generator operable to accelerate a clock signal in response to a first signal, operable to delay said dock signal in response to a second signal, and operable to maintain said clock signal in response to a third signal; a phase detector coupled to said clock generator operable to generate said first signal when a transition edge of said dock signal occurs after a transition edge of a data signal, wherein said phase detector is operable to generate said second signal when said transition edge of said dock signal occurs before said transition edge of said data signal, and wherein said phase detector is operable to generate said third signal when said data signal remains in a same signal state for at least two transition edges of a same type of said clock signal; and a data input coupled to said phase detector allowing said phase detector to receive said data signal from an external circuit. - View Dependent Claims (20, 21, 22, 23, 24, 25, 26, 27)
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Specification