Serial data decoding using state machine with selectable decoding tables

• US 5,455,578 A
• Filed: 05/26/1993
• Issued: 10/03/1995
• Est. Priority Date: 06/24/1992
• Status: Expired due to Term

• Current Assignee: Sony United Kingdom Limited (Sony Group Corp.)
• Original Assignee: Sony United Kingdom Limited (Sony Group Corp.)
• Inventors: Bhandari, Rajan
• Primary Examiner(s): Shoop, Jr., William M.
• Assistant Examiner(s): Pacadini, Albert W.
• Application Number:
  US08/067,037
• Time in Patent Office: 860 Days
• Field of Search: 341/51, 341/63, 341/64, 341/65, 341/67, 341/100
• US Class Current: 341/51
• CPC Class Codes: G11B 20/1426 conversion to or from block codes or representations thereof
• CPC Class Codes: H03M 7/425 for the decoding process only
• CPC Class Codes: H04N 19/10 using adaptive coding
• CPC Class Codes: H04N 19/102 characterised by the element, parameter or selection affected or controlled by the adaptive coding
• CPC Class Codes: H04N 19/13 Adaptive entropy coding, e.g. adaptive variable length coding [AVLC] or context adaptive binary arithmetic coding [CABAC]
• CPC Class Codes: H04N 19/186 the unit being a colour or a chrominance component
• CPC Class Codes: H04N 19/61 in combination with predictive coding
• CPC Class Codes: H04N 19/63 using sub-band based transform, e.g. wavelets

Abstract

A serial data decoding system is described in which a state machine (FIG. 5) is provided having a plurality of branching hierarchies of states, each branching hierarchy of states corresponding to a different decoding table. The state machine incorporates a memory 72 storing control data words (FIG. 7). A latch 74 stores the most recent control data word to be output from the memory. The memory 72 is addressed with a read address formed from a concatenation of the latched value 84, a table selecting word 86, Y/C and a received bit of serial data. When the state machine enters a state 88 corresponding to valid code, the current control data word is output as an identifier of that valid code.

Claims

1. A serial data decoder for generating output data words according to a selectable one of a plurality of decoding tables from serial data comprising a plurality of data sections, differing sets of decoding tables being used for differing data sections and differing decoding tables being used for differing parts of each data section, said serial data decoder comprising a state machine comprising:

a memory with a plurality of address locations each storing a control data word;

a latch for storing a most recent control data word output from said memory;

means for generating a table selecting word in response to a number of received bytes of said serial data, said means for generating including a table counter for generating a table count value, indicative of which decoding table is to be used within a data section, that is concatenated with a data section value, indicative of which set of decoding tables are to be used for a current data section, to form a table selecting word, each table selecting word corresponding to a different decoding table;

a read address bus for supplying a read address to said memory, said read address being formed from a concatenation of at least part of said control data word read from said latch, said table selecting word and a received bit of said serial data and said memory being responsive to said read address to output a new control word to said latch corresponding to moving said state machine to a new state; and

means responsive to a valid code flag within a control data word output from said memory at a state of said state machine corresponding to receipt of a valid code for outputting said control data word as an identifier of said valid code.

2. A serial data decoder as claimed in claim 1, wherein said control data words include a table increment flag for incrementing said table count value.

3. A serial data decoder as claimed in claim 1, wherein a change in data section value resets said table count value to a start table value.

4. A serial data decoder as claimed in claim 3, wherein said serial data comprises blocks of serial data, each block including a plurality of data sections and including a block header specifying said start table value.

5. A serial data decoder as claimed in claim 4, wherein said block header includes a pointer to a boundary between data sections within said block, and said state machine includes a counter responsive to received bits of serial data to provide an indication of position within each block during decoding and a comparator for comparing said pointer and said indication of position and for changing said data section value at said boundary.

6. A method of serial data decoding for generating output data words using a state machine according to a selectable one of a plurality of decoding tables from serial data comprising a plurality of data sections, differing sets of decoding tables being used for differing data sections and differing decoding tables being used for differing parts of each data section, said method comprising the steps of:

outputting a control data word from a memory with a plurality of address locations each storing a control data word;

storing in a latch a most recent control data word output from said memory;

generating a table count value, indicative of which decoding table is to be used within a data section, in response to a number of received bytes of said serial data;

concatenating said table count value with a data section value, indicative of which set of decoding tables are to be used for a current data section to form a table selecting word, each table selecting word corresponding to a different decoding table;

supplying a read address to said memory, said read address being formed from a concatenation of at least part of said control data word read from said latch, said table selecting word and a received bit of said serial data and said memory being responsive to said read address to output a new control word to said latch corresponding to moving said state machine to a new state; and

in response to a valid code flag within a control data word output from said memory at a state of said state machine corresponding to receipt of a valid code, outputting said control data word as an identifier of said valid code.

7. A method of serial data decoding as claimed in claim 6, wherein said control data words include a table increment flag for incrementing said table count value.

8. A method of serial data decoding as claimed in claim 6, wherein a change in data section value resets said table count value to a start table value.

9. A method of serial data decoding as claimed in claim 8, wherein said serial data comprises blocks of serial data, each block including a plurality of data sections and including a block header specifying said start table value.

10. A method of serial data decoding as claimed in claim 9, wherein said block header includes a pointer to a boundary between data sections within said block, and further comprising the steps of:

providing an indication of position within each block during decoding in response to received bits of serial data, comparing said pointer and said indication of position and changing said data section value at said boundary.