Method of testing semiconductor chips with reusable test package

• US 5,456,404 A
• Filed: 10/28/1993
• Issued: 10/10/1995
• Est. Priority Date: 10/28/1993
• Status: Expired due to Term

• Current Assignee: Hewlett-Packard Development Company, L.P. (HP Inc.)
• Original Assignee: Digital Equipment Corporation (HP Inc.)
• Inventors: Ho, Chung W., Robinette, William C. Jr.
• Primary Examiner(s): Ramsey, Kenneth J.
• Application Number:
  US08/144,844
• Time in Patent Office: 712 Days
• Field of Search: 228/104, 228/116, 228/180.22, 324/754, 324/757
• US Class Current: 228/104
• CPC Class Codes: G01R 1/06711 Probe needles; Cantilever beams; "Bump" contacts; Replaceable probe pins
• CPC Class Codes: G01R 1/07357 with flexible bodies, e.g. buckling beams
• CPC Class Codes: H01L 22/20 Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
• CPC Class Codes: H01L 2224/16 of an individual bump connector
• CPC Class Codes: H01L 2924/01067 Holmium [Ho]
• CPC Class Codes: H05K 3/325 by abutting or pinching, i.e. without alloying process; mechanical auxiliary parts therefor adaptations of leads inserted in holes for press-fit connections H05K3/308
• CPC Class Codes: H05K 3/4007 Surface contacts, e.g. bumps H05K3/4092 takes precedence; deposition of finish layers on pads H05K3/24; forming solder bumps H05K3/3457

Abstract

A method for testing semiconductor chips using a test package having electrical contacts which have in them metallized particles which pierce the surface of the pads of a semiconductor chip, the chips being mounted on a flexible substrate which can deflect to increase the uniformity of the level to which the metallized particles pierce the surface of the pads of the semiconductor chip. If the chip tests as "good", pressure can be applied to increase the piercing depth, thereby allowing the test package to be used as a permanent package.

Claims

1. A method of testing a semiconductor device having electrical contacts, comprising the steps of:

forming a semiconductor device test package, the package forming step including the steps of;

placing a layer of a flexible electrical insulator having in it electronic circuitry on a rigid substantially planar substrate, removing a portion of the substrate, such that a portion of the flexible insulator layer lies above the removed portion of said rigid substrate;

forming interconnect pads to match locations of said electrical contacts;

comprising providing metalized particles protruding from said interconnect pads on a surface of the layer lying above the removed portion of the rigid substrate;

placing the semiconductor device on the semiconductor device test package so that the electrical contacts contact the interconnect pads; and

urging the semiconductor device toward the interconnect pads to cause the metallized particles to pierce surfaces of said electrical contacts, controlling the urging force to be sufficient to cause the flexible electrical insulator to deflect to increase uniformity of the depth to which the metallized particles pierce the surface of the electrical contacts for test purposes.

2. The method of testing a semiconductor device having electrical contacts as claimed in claim 1, further comprising the steps of testing the semiconductor device to determine if the semiconductor device performs according to specifications.

3. The method of testing a semiconductor device having electrical contacts as claimed in claim 2, further comprising the step of

in response to a determination that the semiconductor device performs according to specifications, further urging the electrical contacts toward the interconnect pads, to increase the penetration of the metallized particles into the electrical contacts.

4. The method of testing a semiconductor device as claimed in claim 2, further comprising the step of sealing an interface between the electrical contacts and the interconnect pads with a passivation agent.

5. The method of testing a semiconductor device having electrical contacts as claimed in claim 2, further comprising the steps of:

removing the semiconductor device from the semiconductor device test package; and

in response to a determination that the semiconductor device performs according to specifications, mounting the semiconductor device in an operational package.

6. The method of testing a semiconductor device having electrical contacts as claimed in claim 1, the package forming step further including

forming on the surface of the layer an alignment template for aligning the interconnect pads with the electrical contacts.

7. The method of testing a semiconductor device having electrical contacts as claimed in claim 6, further comprising the step of:

testing the semiconductor device to determine if the semiconductor device performs according to specifications.

8. The method of testing a semiconductor device having electrical contacts as claimed in claim 7, further comprising the step of:

in response to a determination that the semiconductor device performs according to specifications, further urging the electrical contacts toward the interconnect pads, to increase the penetration of the metallized particles into the electrical contacts.

9. The method of testing a semiconductor device as claimed in claim 8, further comprising the step of sealing an interface between the electrical contacts and the interconnect pads with a passivation agent.

10. The method of testing a semiconductor device as claimed in claim 1,

wherein the step of removing a portion of the substrate comprises selectively etching a portion of the rigid substrate lying beneath the interconnect pads.

11. The method of testing a semiconductor device having electrical contacts as claimed in claim 10, further comprising the steps of:

testing the semiconductor device to determine if the semiconductor device performs according to specifications; and

in response to determination that the semiconductor device performs according to specifications, further urging the electrical contacts toward the interconnect pads, to increase the penetration of the metallized particles into the electrical contacts.

12. The method of testing a semiconductor device as claimed in claim 11, further comprising the step of sealing an interface between the electrical contacts and the interconnect pads with a passivation agent.