Method for fabricating a circuit element through a substrate

• US 5,456,942 A
• Filed: 09/29/1993
• Issued: 10/10/1995
• Est. Priority Date: 09/29/1993
• Status: Expired due to Term

• Current Assignee: Temic Automotive of North America, Incorporated (Continental AG)
• Original Assignee: Motorola, Inc. (Motorola Solutions, Inc.)
• Inventors: Sardina, Frank A., Bebak, James E., Vinci, Joseph J., Saar, Loren E.
• Primary Examiner(s): Beck, Shrive
• Assistant Examiner(s): MAIORANA, DAVID MICHAEL
• Application Number:
  US08/128,916
• Time in Patent Office: 741 Days
• Field of Search: 427/97, 427/294, 427/296, 427/282, 427/299, 427/384
• US Class Current: 427/97.2
• CPC Class Codes: H05K 2201/09981 Metallised walls
• CPC Class Codes: H05K 2203/0278 Flat pressure, e.g. for connecting terminals with anisotropic conductive adhesive
• CPC Class Codes: H05K 2203/082 Suction, e.g. for holding solder balls or components
• CPC Class Codes: H05K 3/1216 by screen printing or stencil printing
• CPC Class Codes: H05K 3/4053 by thick-film techniques

Abstract

An improved method for fabricating a circuit element through a substrate permits fabrication of large geometry vias between substrate sides. The improved method includes disposing a substrate (327) between two compressible layers (317, 339). Each of the layers (317, 339) has at least one aperture (345, 321) disposed therethrough. The substrate (327), has at least one via (333) aligned between the apertures (345, 321) where the via has an area smaller than an area of the apertures (345, 321). Next, a coating, preferably a liquid circuit element material (351) is disposed into one of the apertures (321) of one of the two compressible layers (339). A pressure (405) is applied between the two compressible layers (317, 339) causing the liquid circuit element material (351) to flow between the two compressible layers (317, 339), thereby coating the at least one via (333) of the substrate (327), thus providing an interconnect (609, 611) of the coating through the substrate (327). The compressed layers (317, 339) confine the spreading of the liquid circuit element material (351). Preferably, the substrate (327) is then cured or fired, thereby changing the liquid circuit element material (351) into a solid state.

Claims

1. A method for fabricating a circuit element through a substrate comprising the steps of:

providing a first compressible layer having at least one aperture disposed therethrough commencing on a first surface and continuing to an opposing second surface wherein the at least one aperture is bounded within a second area;

disposing a first surface of a substrate on the first surface of said compressible layer, wherein said substrate has at least one via disposed therethrough commencing on an opposing second surface and continuing to the first surface, wherein the at least one via is bounded within a first area on the opposing second surface and the first surface, wherein the first area is smaller than the second area associated with the at least one aperture of the first compressible layer, and wherein said disposing step aligns the at least one aperture with the at least one via;

disposing a second surface of a second compressible layer on the opposing second surface of said substrate, wherein said second compressible layer has at least a second aperture disposed commencing on an opposing first surface and continuing to the second surface, wherein the at least a second aperture is bounded within a third area on the second surface larger than the first area of the at least one via of said substrate, and wherein said disposing step aligns the at least a second aperture and the at least one via;

compressing said first compressible layer and the second compressible layer about the first surface and the opposing second surface of said substrate respectively;

disposing a coating into the at least a second aperture of said second compressible layer, wherein said coating is confined within the third area of said second compressible layer; and

providing a pressure difference between the at least a second aperture, and the at least one aperture, thereby drawing the coating from the at least a second aperture, through the at least one via, and through the at least one aperture and providing an interconnect of the coating between the first and opposing second surfaces of said substrate.

2. A method in accordance with claim 1 wherein the coating is comprised of a liquid circuit element material, and wherein said substrate is cured thereby changing the liquid circuit element material from a liquid state to a solid state.

3. A method in accordance with claim 1 wherein said step of providing a first compressible layer includes providing an emulsion layer.

4. A method in accordance with claim 1 wherein said step of providing a first compressible layer includes providing a rigid layer on which a compressible emulsion layer is disposed.

5. A method in accordance with claim 4 wherein said compressible emulsion layer is disposed onto and contacting the first surface of the substrate.

6. A method for fabricating a circuit element through a substrate comprising the steps of:

providing a nesting fixture having a first surface and an opposing second surface, said nesting fixture having a first multiplicity of vias arranged in a circuit pattern disposed therethrough, wherein each via of the first multiplicity of vias is formed extending from the first surface to the opposing second surface, and wherein each via of the first multiplicity of vias has a geometric shape bounded within a first area on the first surface;

disposing a non-framed stencil on the first surface of said nesting fixture, said non-framed stencil comprises a rigid layer having a first surface contacting the first surface of said nesting fixture, and a compressible layer disposed on an opposing second surface of the rigid layer, said non-framed stencil having a second multiplicity of vias arranged in the circuit pattern disposed therethrough, wherein each via of the second multiplicity of vias is formed extending from a first surface of the compressible layer to the first surface of the rigid layer, wherein each via of the second multiplicity of vias has a geometric shape bounded by a second area on the first surface of the compressible layer, and the first surface of the rigid layer, wherein the second area is smaller than the first area associated with the first multiplicity of vias of said nesting fixture, and wherein said disposing step aligns the first and second multiplicity of vias;

disposing a substrate on the first surface of the compressible layer of said non-framed stencil, said substrate having a first surface contacting the first surface of the compressible layer of said non-framed stencil, and an opposing second surface, said substrate having a third multiplicity of vias arranged in the circuit pattern disposed therethrough, wherein each of the third multiplicity of vias is formed extending from the first surface to the opposing second surface, wherein each of the third multiplicity of vias has a geometric shape bounded by a third area on the first surface and the opposing second surface, wherein the third area is smaller than the second area associated with the second multiplicity of vias of said non-framed stencil, and wherein said disposing step aligns the second and third multiplicity of vias;

disposing a framed stencil on the opposing second surface of said substrate, said framed stencil comprises a second surface of a second compressible layer contacting the opposing second surface of said substrate, and a second rigid layer disposed on an opposing first surface of the second compressible layer, said framed stencil having a fourth multiplicity of vias arranged in the circuit pattern disposed therethrough, each via of the fourth multiplicity of vias is formed extending from the second surface of the second compressible layer to an opposing fourth surface of the second rigid layer, wherein each via of the fourth multiplicity of bias has a geometric shape bounded by an area related to the second area of each via of the second multiplicity of vias of said non-framed stencil, and wherein said disposing step aligns the third and fourth multiplicity of vias;

compressing said nesting fixture, said non-framed stencil, said substrate, and said framed stencil, thereby compressing the compressible layer of said non-framed stencil and the compressible layer of said framed stencil about the first surface and the opposing second surface of said substrate;

disposing a liquid circuit element material into the fourth multiplicity of vias of said framed stencil, wherein said liquid circuit element material is confined within the second area of each via of the second surface of the second compressible layer of said framed stencil; and

drawing a vacuum between the oppposing fourth surface of the second rigid layer and the opposing second surface of said nesting fixture, thereby drawing the liquid circuit element material between the fourth multiplicity of vias, and the first multiplicity of vias and providing an interconnect between the first surface and the opposing second surface of said substrate.

7. A method in accordance with claim 6 further comprising the step of:

firing said substrate to change the liquid circuit element material from a liquid state to a solid state.

8. A method in accordance with claim 7 wherein said step of providing a first compressible layer includes providing an emulsion layer. second surface of the second compressible layer to an opposing fourth surface of the second rigid layer, wherein each via of the fourth multiplicity of vias has a geometric shape bounded by an area related to the second area of each via of the second multiplicity of vias of said non-framed stencil, and wherein said disposing step aligns the third and fourth multiplicity of vias;

compressing said nesting fixture, said non-framed stencil, said substrate, and said framed stencil, thereby compressing the compressible layer of said non-framed stencil and the compressible layer of said framed stencil about the first surface and the opposing second surface of said substrate;

disposing a liquid circuit element material into the fourth multiplicity of vias of said framed stencil, wherein said liquid circuit element material is confined within the second area of each via on the second surface of the second compressible layer of said framed stencil; and

drawing a vacuum between the opposing fourth surface of the second rigid layer and the opposing second surface of said nesting fixture, thereby drawing the liquid circuit element material between the fourth multiplicity of vias, and the first multiplicity of vias and providing an interconnect between the first surface and the opposing second surface of said substrate.