High resolution analog current-to-frequency converter

• US 5,457,458 A
• Filed: 02/13/1995
• Issued: 10/10/1995
• Est. Priority Date: 12/21/1993
• Status: Expired due to Term

• Current Assignee: Honeywell Incorporated (Honeywell International Inc.)
• Original Assignee: Honeywell Incorporated (Honeywell International Inc.)
• Inventors: Saxon, James N.
• Primary Examiner(s): Young, Brian K.
• Application Number:
  US08/387,640
• Time in Patent Office: 239 Days
• Field of Search: 341/157, 341/155, 341/166, 341/167, 341/168, 341/169, 341/170
• US Class Current: 341/157
• CPC Class Codes: H03M 1/60 with intermediate conversion to frequency of pulses

Abstract

A current-to-frequency converter which uses current balancing and pulse width modulation. An analog signal from a measurement instrument, such as an accelerometer, is integrated and transmitted to a pulse width modulator. The output from the pulse width modulator controls feedback signals which in turn control current balancing. The output of the pulse width modulating circuit is also connected to a counter which provides a digital output.

Claims

1. An analog-to-digital converter with an analog input and a digital signal output comprising:

current controlled integrating means having a non-inverting input at ground, an inverting input for receiving an analog signal over the analog input, and a voltage output;

timing means which receives a system clock signal and outputs a plurality of timing signals which are dependent on cycles of the system clock;

a ramp signal generating means which cyclically outputs a ramping signal in response to one of the plurality of timing signals;

comparing means which compares the output voltage and the ramping signal and outputs a pulse with a width proportional to the magnitude of the analog signal;

switching means which receives the pulse from the comparator means and is in electrical contact with said timing means;

feedback means connected to said switching means for providing positive or negative current balancing pulses at the inverting input of said current controlled integrator such that over time a residual charge left on the integrating means is indicative of the magnitude of the analog signal; and

digital encoding means connected to said switching means for converting the pulse output from said comparator means through said switching means into a digital output.

2. The analog-to-digital converter of claim 1, wherein the feedback means includes negative and positive current sources which are activated by said switching means.

3. The analog-to-digital converter of claim 2, wherein means are provided to continually equalize the negative and positive current sources during operation of the analog-to-digital converter.

4. The analog-to-digital converter of claim 3, wherein the plurality of timing signals provide control for said ramping signal generator, said switching means and the negative and positive current sources.

5. The analog-to-digital converter of claim 4, wherein the frequency of the plurality of timing signals affects the resolution of the analog to digital converter.

11. The analog-to-digital converter of claim 1 wherein the analog input is from an accelerometer.

12. The analog-to-digital converter of claim 11 wherein the analog-to-digital converter provides the digital output for both negative and positive accelerations.

6. An analog-to-digital converter comprising;

an input for an analog signal;

a current controlled integrator with a non-inverting input at ground, an inverting input which receives said analog signal, and an output voltage;

a timing generator which receives a system clock signal and outputs a plurality of timing signals which are dependent on the system clock signal;

a ramp signal generator which cyclically outputs a ramping signal in response to a signal from said timing generator; and

comparator which compares the output voltage and the ramping signal and outputs a pulse with a width proportional to the magnitude of the analog input;

a plurality of switches in contact with said comparator and said timing generator;

a feedback circuit in connection with the electronic switches for providing current balancing at the inverting input of said current controlled integrator; and

digital encoder connected to said switches for converting the pulse into a digital output.

7. The analog-to-digital converter of claim 6, wherein the feedback circuit includes negative and positive current sources which are activated by said switches.

8. The analog-to-digital converter of claim 7, wherein means are provided to equalize the negative and positive current sources during operation of the analog-to-digital converter.

9. The analog-to-digital converter of claim 8, wherein the plurality of timing signals provides control for said ramping signal generator, said plurality switches, and the means for equalization of the negative and positive current sources.

10. The analog-to-digital converter of claim 9, wherein the frequency of the plurality of timing signals affects the resolution of the analog-to digital-converter.

13. The analog-to-digital converter of claim 6 wherein the analog input is from an accelerometer.

14. The analog-to-digital converter of claim 13 wherein the analog-to-digital converter provides the digital output for both negative and positive accelerations.

15. A method of analog-to-digital conversion comprising the steps of:

receiving an analog signal;

integrating the analog signal so as to generate a first ramping signal with a slope proportional to the analog signal magnitude;

providing a second ramping signal of known slope which periodically resets and begins again after reaching a predetermined magnitude;

comparing the first and second ramping signal during the predetermined period time and generating a first pulse width while the first ramping signal is greater than the second ramping signal and generating a second pulse width while the first ramping signal is less than the second ramping signal;

translating the first and second pulse widths into a digital output indicative of the magnitude and polarity of the analog signal; and

periodically adding pulses of negative and positive current to the analog signal to provide current balancing for integration of the analog signal, where the addition of the positive and negative current is controlled by the size of the first and second pulse widths.

16. The method of analog-to-digital conversion of claim 15 further comprising the step of periodically equalizing the positive and negative currents.