Thin-film transistor panel with reduced number of capacitor lines

• US 5,457,553 A
• Filed: 11/08/1994
• Issued: 10/10/1995
• Est. Priority Date: 12/25/1991
• Status: Expired due to Fees

• Current Assignee: Casio Computer Company Limited
• Original Assignee: Casio Computer Company Limited
• Inventors: Mori, Hisatoshi
• Primary Examiner(s): Sikes, William L.
• Assistant Examiner(s): MAI, HUY KIM
• Application Number:
  US08/336,015
• Time in Patent Office: 336 Days
• Field of Search: 359/58, 359/59, 359/54, 359/87, 340/784, 340/719, 345/93
• US Class Current: 349/39
• CPC Class Codes: G02F 1/136213 Storage capacitors associated with the pixel electrode

Abstract

A TFT panel comprises a transparent substrate made of glass, a plurality of transparent pixel electrodes arranged in a matrix on the transparent substrate, thin-film transistors (TFTs) respectively connected to the pixel electrodes, gate lines respectively connected to the gate electrodes of the TFTs arranged in a column direction of the matrix, data lines respectively connected to drain electrodes of the TFTs arranged in a line direction of the matrix, and capacitor lines for forming storage capacitors. One capacitor line is arranged so as to overlap two adjacent pixel electrodes with an insulating film interposed between the capacitor line and the adjacent pixel electrodes. Two gate lines are interposed between pairs of pixel electrode columns adjacent to each other. The gate electrodes of the TFTs of a pixel electrode column are connected to the gate line adjacent to the pixel electrode column.

Claims

1. A thin-film transistor panel comprising:

a transparent insulating substrate having a surface;

a plurality of transparent pixel electrodes arranged in a matrix on said surface of said insulating substrate;

a plurality of thin-film transistors positioned to respectively correspond to said pixel electrodes, and each of said thin-film transistors having gate, source and drain electrodes, one of said source and drain electrodes being connected to an associated one of said pixel electrodes;

gate lines formed between said pixel electrodes in pairs on said surface of said insulating substrate, each of said gate lines extending in a first direction of a row direction and a column direction of the matrix, and each of said gate lines being connected to the gate electrodes of the thin-film transistors arranged in the first direction;

data lines formed between said pixel electrodes on the one surface of said insulating substrate, each of said data lines extending in a second direction of the row direction and the column direction of the matrix, and each of said data lines being connected to the other of said source and drain electrodes of the thin-film transistors arranged in the second direction;

capacitor lines formed between two pairs of the pixel electrodes, extending in the first direction substantially in parallel with the gate lines, each of said capacitor lines facing a plurality of pixel electrodes including at least two pixel electrodes which are adjacent to each other in the second direction; and

an insulating film provided between each of said capacitor lines and its facing at least two pixel electrodes such that a part of the capacitor line, a part of the at least two pixel electrodes an the insulating film, overlap each other and form storage capacitors;

wherein, each of said gate lines is provided between two pixel electrodes which are adjacent to each other in the second direction of the matrix, said gate lines extending in the first direction of the matrix, and said gate lines being connected to the gate electrodes of the thin-film transistors corresponding to the two adjacent pixel electrodes; and

said data lines are arranged such that a row or column of said pixel electrodes is interposed between two data lines and are connected to every the other of said drain and source electrodes of said plurality of thin-film transistors corresponding to the pixel electrodes of each of said data lines.

2. A thin-film transistor panel according to claim 1, wherein each of said capacitor lines comprises a substantially straight transparent conductive line.

3. An active matrix liquid crystal display element comprising:

a first transparent insulating substrate having a surface;

a plurality of transparent pixel electrodes arranged in a matrix on said surface of said first transparent insulating substrate;

a plurality of thin-film transistors respectively connected to said pixel electrodes, each of said thin-film transistors having a source and a drain electrode, and one of said source and drain electrodes of each of said thin-film transistors being connected to each of said pixel electrodes;

gate lines formed between said pixel electrodes in pairs on said surface of said first transparent insulating substrate, each of said gate lines extending in a first direction of a row direction and a column direction of the matrix, and each of said gate lines being connected to the gate electrodes of the thin-film transistors arranged in the first direction;

data lines formed between said pixel electrodes on said surface of said first transparent insulating substrate, each of said data lines extending in a second direction of the row direction and the column direction of the matrix, and each of said data lines being connected to the other of said source and drain electrodes of the thin-film transistors arranged in the second direction;

capacitor lines formed between two pairs of the pixel electrodes, extending in the first direction substantially in parallel with the gate lines, each of said capacitor lines facing a plurality of pixel electrodes including at least two pixel electrodes which are adjacent to each other in the second direction through an insulating film, and said capacitor lines being arranged such that storage capacitors are formed between at least a part of the respective capacitor line and the at least two facing pixel electrodes which overlap each other with said insulating film therebetween;

a second transparent insulating substrate having a plurality of opposite electrodes which face said plurality of pixel electrodes, said second transparent insulating substrate being adhered to said first transparent insulating substrate by a sealing material; and

a liquid crystal material sealed in a region enclosed by said first and second transparent insulating substrates and said sealing material;

wherein, each of said gate lines is provided between two pixel electrodes which are adjacent to each other in the row direction of the matrix, said gate lines extending in the column direction of the matrix, and said gate lines being connected to the gate electrodes of the thin-film transistors corresponding to the two adjacent pixel electrodes;

said data lines are arranged at both sides of a row of said pixel electrodes and are connected to every the other of said drain and source electrodes of said plurality of thin-film transistors corresponding to the pixel electrodes of each of said data lines; and

said capacitor lines extend substantially in parallel with said gate lines, each of said capacitor lines overlapping two pixel electrodes which are adjacent to each other in a row direction of the matrix.

4. An active matrix liquid crystal display element according to claim 3, wherein each of said capacitor lines comprises a substantially straight transparent conductive line.

5. An active matrix liquid crystal display element according to claim 3, wherein each of said thin-film transistors is connected to an associated pixel electrode at one end thereof in the second direction, and each capacitor line faces the pixel electrodes at the other end of said associated pixel electrode in the second direction.

6. A thin-film transistor panel comprising:

a plurality of transparent pixel electrodes arranged in a matrix;

a plurality of thin-film transistors respectively corresponding to said pixel electrodes, and each thin-film transistor having gate, source and drain electrodes, one of said source and drain electrodes of each thin-film transistor being connected to a respective one of said pixel electrodes;

gate lines formed between two pairs of the pixel electrodes extending in a column direction of the matrix and connected to the gate electrodes of the thin-film transistors arranged in an associated column of the matrix;

data lines extending in a row direction of the matrix and connected to the other of said source and drain electrodes of the thin-film transistors arranged in an associated row of the matrix;

capacitor lines, each provided for two columns of the matrix and extending in the column direction of the matrix substantially in parallel with the gate lines but is not adjacent to these gate lines, each of said capacitor lines partially overlapping with the pixel electrodes arranged in an associated two columns; and

insulating means arranged between said capacitor lines and the respective partially overlapping pixel electrodes for insulating said capacitor lines and said respective partially overlapping pixel electrodes from each other;

each of said capacitor lines and the pixel electrodes of an associated two columns facing each other to form storage capacitors; and

wherein each of said plurality of gate lines is provided for an associated two columns of the matrix, and is connected to the gate electrodes of the thin-film transistors of the associated two columns.

7. A thin-film transistor panel according to claim 6, wherein each of said capacitor lines comprises a substantially straight transparent conductive line.

8. An active matrix liquid crystal display element comprising:

first and second transparent insulating substrates facing each other, the first and second transparent insulating substrates each having inner surfaces which face each other;

a plurality of transparent pixel electrodes arranged in a matrix on the inner surface of the first transparent insulating substrate;

a plurality of thin-film transistors formed on the inner surface of the first transparent insulating substrate, said thin-film transistors respectively corresponding to said pixel electrodes, and each thin-film transistor having gate, source and drain electrodes, one of said source and drain electrodes of each thin-film transistor being connected to a respective one of said pixel electrodes;

gate lines provided on the inner surface of the first transparent insulating substrate, said gate lines being formed between two pairs of the pixel electrodes and extending in a column direction of the matrix, and said gate lines being connected to the gate electrodes of said thin-film transistors which are arranged in an associated column of the matrix;

data lines, provided on the inner surface of the first transparent insulating substrate, said data lines extending in a row direction of the matrix, and said data lines being connected to the other of said source and drain electrodes of the thin-film transistors which are arranged in an associated row of the matrix;

capacitor lines provided on the inner surface of the first transparent insulating substrate, each capacitor line being provided for two columns of the matrix and each capacitor line extending in the column direction substantially in parallel with the gate lines but is not adjacent to these gate lines, each capacitor line partially overlapping with the pixel electrodes arranged in an associated two columns, and each of said capacitor lines and the pixel electrodes of the associated two columns forming storage capacitors;

insulating means arranged between said capacitor lines and the respective partially overlapping pixel electrodes for insulating said capacitor lines and said respective partially overlapping pixel electrodes from each other; and

a liquid crystal material sealed in a region enclosed by said first and second transparent insulating substrates and a sealing material which adheres said first and second transparent insulating substrates to each other with said liquid crystal material therebetween; and

wherein each of said plurality of gate lines is provided for an associated two columns of the matrix, and is connected to the gate electrodes of the thin-film transistors of the associated two columns.

9. An active matrix liquid crystal display element according to claim 8, wherein each of said capacitor lines comprises a substantially straight transparent conductive line.