CPU-independent and device-driver transparent system for translating a computer's internal bus signals onto an intermediate bus and further translating onto an expansion bus

• US 5,457,785 A
• Filed: 02/10/1993
• Issued: 10/10/1995
• Est. Priority Date: 02/10/1993
• Status: Expired due to Term

• Current Assignee: PDACO LIMITED
• Original Assignee: Elonex Technologies, Inc.
• Inventors: Kikinis, Dan, Dornier, Pascal, Seiler, William J., Jocobs, William S.
• Primary Examiner(s): Lee, Thomas C.
• Assistant Examiner(s): WEINSTEIN, MARC
• Application Number:
  US08/016,122
• Time in Patent Office: 972 Days
• Field of Search: 395/275, 395/500, 395/425, 395/800, 364/200
• US Class Current: 710/307
• CPC Class Codes: F02B 2075/027 four
• CPC Class Codes: G06F 1/16 Constructional details or arrangements
• CPC Class Codes: G06F 1/1632 External expansion units, e.g. docking stations
• CPC Class Codes: G06F 13/385 for adaptation of a particular data processing system to different peripheral devices
• CPC Class Codes: G06K 15/00 Arrangements for producing a permanent visual presentation of the output data , e.g. computer output printersprinting or plotting combined with another operation, e.g. with conveying, G06K17/00
• CPC Class Codes: G06K 2215/0082 Architecture adapted for a particular function
• CPC Class Codes: H04M 1/725 Cordless telephones user interfaces specially adapted therefor H04M1/724
• CPC Class Codes: H04M 3/42323 PBX's with CTI arrangements
• CPC Class Codes: H04N 1/00127 Connection or combination of a still picture apparatus with another apparatus, e.g. for storage, processing or transmission of still picture signals or of information associated with a still picture
• CPC Class Codes: H04N 1/00204 with a digital computer or a digital computer system, e.g. an internet server programmed control between transmitter and receiver or between image input and image output device H04N1/32561
• CPC Class Codes: H04N 1/00236 using an image reading or reproducing device, e.g. a facsimile reader or printer, as a local input to or local output from a computer image input to or image output from a computer via a network H04N1/00209
• CPC Class Codes: H04N 1/00238 using an image reproducing device as a local output from a computer output via network, e.g. network printing H04N1/00233
• CPC Class Codes: H04N 1/00241 using an image reading device as a local input to a computer input via network, e.g. network scanners H04N1/00225
• CPC Class Codes: H04N 1/00278 with a printing apparatus, e.g. a laser beam printer
• CPC Class Codes: H04N 1/0461 part of the apparatus being used in common for reading and reproducing simultaneous scanning of the original picture and the reproduced picture with a common scanning device H04N1/207
• CPC Class Codes: H04N 1/1135 for the main-scan only
• CPC Class Codes: H04N 1/12 using the sheet-feed movement or the medium-advance or the drum-rotation movement as the slow scanning component, e.g. arrangements for the main-scanningsheet-feed movement by translatory movement of a flat picture-bearing surface H04N1/1008; main-scanning using oscillating or rotating mirrors H04N1/113; using multi-element arrays H04N1/19
• CPC Class Codes: H04N 1/193 using electrically scanned linear arrays , e.g. linear CCD arrays
• CPC Class Codes: H04N 2201/001 Sharing resources, e.g. processing power or memory, with a connected apparatus or enhancing the capability of the still picture apparatus
• CPC Class Codes: H04N 2201/0074 Arrangements for the control of a still picture apparatus by the connected apparatus arrangements for the control of the connected apparatus by the still picture apparatus H04N2201/0013; control of image communication with the connected apparatus H04N2201/0015
• CPC Class Codes: H04N 2201/0081 : Image reader H04N2201/0091 - H04N2201/0094 take precedence
• CPC Class Codes: H04N 2201/0082 : Image hardcopy reproducer H04N2201/0091 - H04N2201/0094 take precedence

Abstract

A bus interface system for expanding the I/O capability of a portable computer utilizes a parallel port connector with master interface circuitry connected to the internal ISA I/O bus of the portable computer and driving a 25-conductor Centronics-type cable as an intermediate bus. The master interface circuitry is device-driver-transparent, and multiplexes address, data, and control information over a byte-wide avenue of the intermediate bus according to premapped state translation tables. In a preferred embodiment a single peripheral I/O device comprising a slave circuitry may be connected to the 25-pin port, and the slave circuitry demultiplexes the intermediate bus states, providing a synthesized sub-set of ISA states to drive the peripheral device. In another embodiment a docking box comprises a bus with multiple I/O ports, such as a network port, a COM serial port, and additional floppy and hard disk drives. Power circuitry is provided for driving a single connected peripheral device, and for recharging a docked portable computer.

Claims

1. A bus expansion system for a computer having a CPU and an internal I/O bus, comprising:

an intermediate bus link compatible with an IBM-type standard parallel port (SPP);

an expansion bus external to the computer, the expansion bus having the width and parallel structure of the internal I/O bus;

first state-translation circuitry connected to said internal I/O bus and to said intermediate bus link; and

second state-translation circuitry connected to said intermediate bus link and to said expansion bus;

wherein said first state-translation circuitry translates and multiplexes bus signals appropriate to I/O peripheral devices from said internal I/O bus onto said intermediate bus link, and said second state-translation circuitry translates the signals on the intermediate bus link onto said expansion bus, providing on the expansion bus the signals and structure of the internal bus in a manner allowing the CPU to transact with peripheral devices connected to the expansion bus exactly as though they were connected on the internal I/O bus, requiring no dedicated device-driver software executed by the CPU.

2. A bus expansion system as in claim 1 wherein said internal I/O bus comprises an ISA standard bus, said first state-translation circuitry is interfaced to a 25-pin standard parallel port (SPP) connector, and said intermediate bus link is a 25-conductor parallel cable with 25-pin connectors at each end.

3. A bus expansion system as in claim 2 wherein said second state-translation circuitry is incorporated into a peripheral I/O device, said peripheral I/O device being a floppy-disk drive or a hard disk drive, and wherein said second state-translation circuitry translates states between said intermediate bus link and a controller for said peripheral I/O device.

4. A bus expansion system as in claim 2 wherein said second state-translation circuitry is incorporated into a docking box having a 25-pin connector for connecting to said intermediate bus link, and said second state-translation circuitry drives a synthesized ISA bus as the expansion bus within the docking box, realizing a subset of states of said internal I/O bus required to communicate with peripheral I/O devices without use of dedicated device-driver software by the CPU.

5. A bus expansion system as in claim 4 wherein said docking box further comprises one or more of a network port with an external connector for interfacing to a serial cable, a hard disk controller for connecting to a hard disk drive within the docking box, a floppy disk controller for connecting to a floppy disk drive within the docking box, a serial port with an external serial connector, and a printer port with an external connector for interfacing to a printer.

6. A bus expansion system as in claim 4 wherein said computer is a portable computer having an on-board storage power supply and said docking box comprises a primary power supply connected to pins of said 25-pin connector, and wherein said primary power supplies power via conductors of said intermediate bus link to recharge said on-board storage power supply of said computer.

7. A bus expansion system as in claim 2 wherein, on power-up and reset, the CPU tests devices connected to the expansion bus for compatibility with a standard parallel port (SPP) communication mode, a standard enhanced parallel port (EPP) communication mode, and with a proprietary E² P² communication mode, and configures the first state-translation circuitry to operate in an appropriate mode according to the tested compatibility of the devices connected on the expansion bus.

8. A bus expansion system as in claim 2 wherein said computer is a portable computer having an on-board storage power supply, and wherein said SPP connector comprises pins connected to said storage power supply for supplying power from said on-board storage power supply via conductors of said intermediate bus link, to power a peripheral device connected to said expansion bus.

9. A bus expansion system as in claim 1 wherein said first state-translation circuitry translates states between said internal I/O bus and said intermediate bus link according to at least one pre-mapped translation table.

12. Structure of claim 1 further comprising said second state-translation circuitry and said expansion bus coupled to said second state-translation circuitry, said structure further comprising at least one peripheral I/O device coupled to said slave bus.

10. Structure for being coupled to a system comprising a CPU, an internal I/O bus coupled to said CPU, an intermediate bus, and first state-translation circuitry connected to said internal I/O bus and to said intermediate bus for multiplexing address, data and control signals onto said intermediate bus, said structure comprising:

an expansion bus having a physical configuration substantially the same as said internal I/O bus; and

second state-translation circuitry coupled to said expansion bus and to said intermediate bus for receiving said multiplexed address, data and control signals from said intermediate bus and for driving said slave bus;

wherein said second state-translation circuitry drives said expansion bus with a subset of states of said internal I/O bus, said subset including those states appropriate to communicating with peripheral I/O devices, and not including any commands foreign to bus states of said internal I/O bus.

11. Structure comprising:

a computer having a CPU coupled to an internal I/O bus;

an intermediate bus; and

state-translation circuitry coupled to said internal I/O bus and to said intermediate bus for monitoring bus states of said internal I/O bus, and for multiplexing signals according to said bus states onto said intermediate bus in a manner that is CPU-independent and device-driver-transparent, so that said signals can be used to communicate with a second state-translation circuitry that demultiplexes said address, data and control signals and drives an expansion bus with said demultiplexed signals.

13. Structure of claim 11 wherein said state-translation circuitry is configured on power-up and reset by a BIOS routine which determines whether said state-translation circuitry is to drive said intermediate bus as a standard parallel port (SPP), a standard enhanced parallel port (EPP), or an extended enhanced parallel port (E² P²), and configures said state-translation circuitry to drive said intermediate bus as a SPP, an EPP, or as an E² P².

14. Structure of claim 13 wherein said BIOS routine deduces the nature of any devices coupled to said expansion bus in order to determine whether said state-translation circuitry should drive said intermediate bus as said SPP, as said EPP, or as said E² P².

15. Structure of claim 14 wherein said state-translation circuitry can be configured to deduce the nature of devices coupled to expansion bus a second time after said state-translation circuitry deduces the nature of devices coupled to said expansion bus a first time and said structure has been operating.