Apparatus and method for digital circuit testing
First Claim
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1. A method for in-circuit testing comprising the steps of:
- (a) providing a plurality of latches each connected to an input of one buffer of a plurality of buffers;
(b) writing commands into selected ones of said plurality of latches;
(c) said buffers driving selected input nodes within a digital circuit responsive to commands in said plurality of latches, said input nodes serving as inputs to the circuit being tested;
(d) making an electrical connection between an output node of the circuit being tested and a comparator for comparing the output from the output node to a threshold; and
(e) reading the output of the comparator.
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Abstract
An apparatus and method for digital circuit testing in which latches store a single command for each assigned node in a circuit to be tested. Buffers are used to drive the nodes of the circuit being tested in accordance with the drive commands. The outputs from the circuit being tested are selectively applied to at least one comparator. A multiplexor reduces the number of comparators required for accessing the all pertinent nodes of the digital circuit being tested.
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Citations
20 Claims
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1. A method for in-circuit testing comprising the steps of:
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(a) providing a plurality of latches each connected to an input of one buffer of a plurality of buffers; (b) writing commands into selected ones of said plurality of latches; (c) said buffers driving selected input nodes within a digital circuit responsive to commands in said plurality of latches, said input nodes serving as inputs to the circuit being tested; (d) making an electrical connection between an output node of the circuit being tested and a comparator for comparing the output from the output node to a threshold; and (e) reading the output of the comparator. - View Dependent Claims (2, 3)
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4. A digital circuit tester comprising:
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a plurality of latches, each said latch containing a single command for an assigned node on a circuit to be tested; a plurality of drivers, each of said drivers connected to one of said latches for immediately receiving the single command contained in said one of said latches for producing a signal, responsive to the single command, at logic levels corresponding to the logic levels of the circuit to be tested and wherein each of said drivers comprises a plurality of buffers connected in parallel so as to produce a drive signal with sufficient current to drive an input of the circuit to be tested and an output of a circuit connected to the circuit to be tested; and means for comparing outputs from the nodes of the circuit to be tested with threshold levels. - View Dependent Claims (5, 6, 7, 8)
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9. A digital circuit tester comprising:
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means for storing commands each of a plurality of assigned nodes on a circuit to be tested; a plurality of buffers, each of said buffers connected to receive one of the commands contained in said storing means for driving a signal, responsive to the one command, at logic levels corresponding to the logic levels of the circuit to be tested; and means for comparing outputs from the nodes of the circuit to be tested with threshold levels. - View Dependent Claims (10, 11, 12)
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13. A digital circuit tester comprising:
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means for externally driving selected nodes of a digital circuit in accordance with a predefined test; multiplexor means having a number of inputs for connection to each node of a circuit to be tested and a plurality of outputs, wherein the number of outputs is smaller than the number of inputs; and a plurality of comparators, each comparator connected to one of said plurality of outputs and at least one threshold, each comparator having a comparator output for giving a result of comparing the one of said plurality of outputs connected thereto with the at least one threshold. - View Dependent Claims (14, 15, 16, 17)
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18. A digital circuit tester comprising:
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a plurality of latches, each said latch containing a single command for an assigned node on a circuit to be tested; a plurality of buffers, each of said buffers connected to at least one of said latches, for driving a signal on the assigned node of a circuit to be tested responsive to the at least one of said latches; multiplexor means having a number of inputs for connection to each node of a circuit to be tested and at least one output, wherein the number of outputs is smaller than the number of inputs; and a comparator connected to each of said at least one outputs and at least one threshold, each comparator having a comparator output for giving a result of comparing the at least one output connected thereto with the at least one threshold. - View Dependent Claims (19, 20)
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Specification