Digital signal decoding apparatus

• US 5,461,378 A
• Filed: 09/08/1993
• Issued: 10/24/1995
• Est. Priority Date: 09/11/1992
• Status: Expired due to Term

• Current Assignee: Sony Corporation (Sony Group Corp.)
• Original Assignee: Sony Corporation (Sony Group Corp.)
• Inventors: Watanabe, Takahiro, Abe, Miki, Akagiri, Kenzo, Shimoyoshi, Osamu
• Primary Examiner(s): Williams, Howard L.
• Application Number:
  US08/118,456
• Time in Patent Office: 776 Days
• Field of Search: 341/50, 341/51, 395/2.13, 395/2.37
• US Class Current: 341/51
• CPC Class Codes: H04B 1/665 using psychoacoustic properties of the ear, e.g. masking effect

Abstract

There is provided a decoding apparatus adapted for decoding a coded signal from a coding apparatus adapted to divide an input, digital signal into signals in frequency bands by using at least one filter to divide respective filter outputs into blocks every plural words to carry out a first block floating processing every respective blocks to further implement an orthogonal transform processing to the signal which has been subjected to the first block floating processing to thereby conduct frequency analysis thereafter to divide the orthogonally transformed output into blocks every plural words to carry out a second block floating processing every respective blocks, wherein after the second block floating is released by using a predetermined number of inverse floating circuits, the coded signal is restored to a signal on the time base by inverse orthogonal transform processing at a predetermined number of IMDCT circuits, and the first block floating is released in the process of the inverse orthogonal transform operation.

Claims

1. A method of decoding a coded digital signal, the coded digital signal generated by spectrally separating an input signal, plural word blocking the spectrally separated input signal, orthogonally transforming the blocked spectrally separated input signal and adaptive bit allocation coding the transformed blocked spectrally separated input signal, comprising the steps of:

adaptively decoding the coded digital signal into plural signals;

calculating a first block floating quantity from a floating quantity derived from the input signal;

calculating a second block floating quantity from the first block floating quantity;

releasing a second block floating of each of the plural signals based upon the second block floating quantity;

determining a number of scale down times based upon the first block floating quantity;

inverse orthogonally transforming and releasing a first block floating of the second block floating released plural signals based upon the scale down times and based upon block size data derived from the input signal; and

bit shifting each of the inverse orthogonally transformed plural signals.

2. The method of claim 1, further comprising the step of:

combining the bit shifted orthogonally transformed plural signals to generate a synthesized signal.

3. The method of claim 2, wherein the step of combining is performed by at least one filter, further comprising the steps of:

broadening a frequency bandwidth in response to a shift of the input signal to a lower frequency band.

4. The method of claim 3, wherein the filters for combining are cascade-connected.

5. The method of claim 1, wherein the step of inverse orthogonally transforming further comprises the step of:

releasing the first block floating based upon repeated scale downs.

6. The method of claim 5, wherein the repeated scale downs are reversible.

7. The method of claim 6, wherein a number of scale down times is determined on the basis of the first block floating quantity.

8. The method of claim 5, wherein scale down is implemented in the step of inverse orthogonal transforming to thereby prevent overflow.

9. The method of claim 1, wherein said step of inverse orthogonal transforming is performed at a variable block size.

10. The method of claim 1, 2, 5, 6, 7 or 8, wherein the inverse orthogonal transforming is an inverse modified cosine transforming.

11. A method of decoding a coded digital signal, the coded digital signal generated by dividing into blocks every several words of an input signal, orthogonally transforming the blocks and adaptive bit allocation coding the orthogonally transformed blocks, comprising the steps of:

adaptively decoding the coded digital signal into plural signals;

calculating a first block floating quantity from a floating quantity derived from the input signal;

calculating a second block floating quantity from the first block floating quantity;

releasing a second block floating of each of the plural signals based upon the second block floating quantity;

determining a number of scale down times based upon the first block floating quantity;

inverse orthogonally transforming and releasing a first block floating of the second block floating released plural signals based upon the scale down times and based upon block size data derived from the input signal; and

bit shifting each of the inverse orthogonally transformed plural signals.

12. The method of claim 11, further comprising the step of:

combining the bit shifted orthogonally transformed plural signals to generate a synthesized signal.

13. The method of claim 11, wherein the step of inverse orthogonally transforming further comprises the step of:

releasing the first block floating based upon repeated scale downs.

14. The method of claim 13, wherein the repeated scale downs are reversible.

15. The method of claim 14, wherein a number of scale down times is determined on the basis of the first block floating quantity.

16. The method of claim 13, wherein scale down is implemented in the step of inverse orthogonal transforming to thereby prevent overflow.

17. The method of claim 11, 12, 13, 14, 15 or 16, wherein the inverse orthogonal transforming is an inverse modified cosine transforming.

18. The method of claim 11, wherein said inverse orthogonal transforming is performed at a variable block size.

19. An apparatus for decoding a coded digital signal, the coded digital signal generated by spectrally separating an input signal, plural word blocking the spectrally separated input signal, orthogonally transforming the blocked spectrally separated input signal and adaptive bit allocation coding the orthogonally transformed blocked spectrally separated input signal, comprising:

means for adaptively decoding the coded digital signal into plural signals;

means for calculating a first block floating quantity from a floating quantity derived from the input signal;

means for calculating a second block floating quantity from the first block floating quantity;

means for releasing a second block floating of each of the plural signals based upon the second block floating quantity;

means for determining a number of scale down times based upon the first block floating quantity;

means for inverse orthogonally transforming and releasing a first block floating of the second block floating released plural signals based upon the scale down times and based upon block size data derived from the input signal; and

means for bit shifting each of the inverse orthogonally transformed plural signals.

20. The apparatus of claim 19, further comprising:

means for combining the bit shifted orthogonally transformed plural signals to generate a synthesized signal.

21. The apparatus of claim 20, wherein the means for combining further comprises:

cascade-connected band synthesis filters.

22. The apparatus of claim 19, wherein the means for inverse orthogonally transforming further comprises:

means for releasing the first block floating based upon repeated scale downs.

23. The apparatus of claim 22, wherein the repeated scale downs are reversible.

24. The apparatus of claim 23, wherein the means for releasing further comprises:

means for determining a number of scale down times on the basis of the first block floating quantity.

25. The apparatus of claim 22, wherein scale down is implemented to thereby prevent overflow.

26. The apparatus of claim 19, wherein said means for inverse orthogonal transforming transforms at a variable block size.

27. The apparatus of claim 19, 20, 21, 22, 23, 24, or 25, wherein the means for inverse orthogonal transforming comprises:

an inverse modified cosine transformer.

28. An apparatus for decoding a coded digital signal, the coded digital signal generated by dividing into blocks every several words of an input signal, orthogonally transforming the blocks and adaptive bit allocation coding the orthogonally transformed blocks, comprising:

means for adaptively decoding the coded digital signal into plural signals;

means for calculating a first block floating quantity from a floating quantity derived from the input signal;

means for calculating a second block floating quantity from the first block floating quantity;

means for releasing a second block floating of each of the plural signals based upon the second block floating quantity;

means for determining a number of scale down times based upon the first block floating quantity;

means for inverse orthogonally transforming and releasing a first block floating of the second block floating released plural signals based upon the scale down times and based upon block size data derived from the input signal; and

means for bit shifting each of the inverse orthogonally transformed plural signals.

29. The apparatus of claim 28, further comprising:

means for combining the bit shifted orthogonally transformed plural signals to generate a synthesized signal.

30. The apparatus of claim 29, wherein the means for combining further comprises:

cascade-connected band synthesis filters.

31. The apparatus of claim 28, wherein the means for inverse orthogonally transforming further comprises:

means for releasing the first block floating based upon repeated scale downs.

32. The apparatus of claim 31, wherein the repeated scale downs are reversible.

33. The apparatus of claim 32, wherein the means for releasing further comprises:

means for determining a number of scale down times on the basis of the first block floating quantity.

34. The apparatus of claim 31, wherein scale down is implemented to thereby prevent overflow.

35. The apparatus of claim 28, wherein said means for inverse orthogonal transforming transforms at a variable block size.

36. The apparatus of claim 28, 29, 30, 31, 32, 33 or 34, wherein the means for inverse orthogonal transforming comprises:

an inverse modified cosine transformer.