Error correction in a spread spectrum transceiver

• US 5,461,629 A
• Filed: 09/09/1992
• Issued: 10/24/1995
• Est. Priority Date: 09/09/1992
• Status: Expired due to Term

• Current Assignee: Echelon Corporation (Renesas Electronics Corporation)
• Original Assignee: Echelon Corporation (Renesas Electronics Corporation)
• Inventors: Sutterlin, Philip H., Hurlbut, Amy O.
• Primary Examiner(s): Baker, Stephen M.
• Application Number:
  US07/942,723
• Time in Patent Office: 1,140 Days
• Field of Search: 371/37.1, 371/30, 371/49.1, 375/1
• US Class Current: 714/746
• CPC Class Codes: H04B 1/69 Spread spectrum techniques
• CPC Class Codes: H04B 2203/5408 using protocols
• CPC Class Codes: H04B 2203/542 using zero crossing information
• CPC Class Codes: H04B 2203/5458 Monitor sensor; Alarm systems
• CPC Class Codes: H04B 2203/5483 using coupling circuits
• CPC Class Codes: H04B 3/542 the information being in digital form
• CPC Class Codes: H04L 1/0057 Block codes H04L1/0061, H04L1/0064 take precedence

Abstract

An improved transceiver for power line communication using a spread spectrum signal. The amount of correlation for each bit in a word is determined. If a parity error occurs, the state of the bit with the weakest correlation is changed.

Claims

1. An apparatus for correcting an error in a digital word, where the digital word and a parity bit for the word are transmitted using a spread spectrum signal comprising:

a shift register for correlating the spread spectrum signal with a predetermined waveform;

register means for receiving the maximum correlation value for each bit in the word coupled to the shift register;

comparator means coupled to the register means for identifying a lowest maximum correlation value for the bits in the digital word from the maximum correlation values for each bit received by the register means;

error detection mean for detecting a parity error in the digital word;

bit position determining means for determining the position in the digital word of the bit having the lowest maximum correlation value, coupled to the comparator means; and

,

bit changing means coupled to said error detection means and said bit position deterining means for selectively changing the state of the bit corresponding to the lowest maximum correlation value.

2. The apparatus defined by claim 1 wherein said register means includes a greater than comparator means for comparing correlation values and for identifying correlation values which are greater than other correlation values for each bit.