Method and apparatus for encoding/decoding image data
First Claim
1. A processing apparatus for processing variable length input data to generate variable length output data comprising:
- a. an input circuit for providing said input data;
b. a plurality of processing modules coupled to said input circuit for processing said input data;
c. a shared memory coupled to said input circuit and said plurality of processing modules, said shared memory for receiving said input data from said input circuit, providing said input data to said plurality of processing modules, for posting jobs to be processed by said plurality of processing modules, and for providing communication between said plurality of processing modules and said input circuit;
d. a first bus coupled to said plurality of processing modules and said shared memory, said first bus for transmitting said input data from said shared memory to said plurality of processing modules, said first bus including variable precision communication means allowing said input data to be of variable length and/or variable precision;
e. an output circuit coupled to said plurality of processing modules for receiving said output data; and
f. a second bus coupled to said input circuit and said plurality of processing modules, each of said plurality of processing modules including;
i. a processor for processing said jobs posted in said shared memory, certain of said jobs allocated to said processing module for processing a portion of said input data to create a portion of said output data, wherein said portion of said input or said output data may be variable in length or precision according to operating circumstances;
ii. a dual-port memory coupled to said processor and said second bus for providing communication between said processing module and said input circuit;
iii. a processor memory coupled to said processor for processing said portion of said input data; and
iv. an arbitration mechanism coupled to said processor for allowing said processing module to request and obtain access to said shared memory for receiving said certain jobs allocated to said processing module to receive said portion of said input data.
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Accused Products
Abstract
An apparatus and method for processing video data for compression/decompression in real-time. The apparatus comprises a plurality of compute modules, in a preferred embodiment, for a total of four compute modules coupled in parallel. Each of the compute modules has a processor, dual port memory, scratch-pad memory, and an arbitration mechanism. A first bus couples the compute modules and a host processor. Lastly, the device comprises a shared memory which is coupled to the host processor and to the compute modules with a second bus. The method handles assigning portions of the image for each of the processors to operate upon.
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Citations
15 Claims
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1. A processing apparatus for processing variable length input data to generate variable length output data comprising:
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a. an input circuit for providing said input data; b. a plurality of processing modules coupled to said input circuit for processing said input data; c. a shared memory coupled to said input circuit and said plurality of processing modules, said shared memory for receiving said input data from said input circuit, providing said input data to said plurality of processing modules, for posting jobs to be processed by said plurality of processing modules, and for providing communication between said plurality of processing modules and said input circuit; d. a first bus coupled to said plurality of processing modules and said shared memory, said first bus for transmitting said input data from said shared memory to said plurality of processing modules, said first bus including variable precision communication means allowing said input data to be of variable length and/or variable precision; e. an output circuit coupled to said plurality of processing modules for receiving said output data; and f. a second bus coupled to said input circuit and said plurality of processing modules, each of said plurality of processing modules including; i. a processor for processing said jobs posted in said shared memory, certain of said jobs allocated to said processing module for processing a portion of said input data to create a portion of said output data, wherein said portion of said input or said output data may be variable in length or precision according to operating circumstances; ii. a dual-port memory coupled to said processor and said second bus for providing communication between said processing module and said input circuit; iii. a processor memory coupled to said processor for processing said portion of said input data; and iv. an arbitration mechanism coupled to said processor for allowing said processing module to request and obtain access to said shared memory for receiving said certain jobs allocated to said processing module to receive said portion of said input data. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13)
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14. A processing apparatus for processing variable length input data to generate variable length output data comprising:
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a. an input circuit for providing said input data; b. a plurality of processing modules coupled to said input circuit for processing said input data; c. a shared memory coupled to said input circuit and said plurality of processing modules, said shared memory for receiving said input data from said input circuit, providing said input data to said plurality of processing modules, for posting jobs to be processed by said plurality of processing modules, for receiving said output data from said plurality of processing modules and for providing communication between said plurality of processing modules and said input circuit; d. a processing bus coupled to said plurality of processing modules and said shared memory, said processing bus for transmitting said input data from said shared memory to said plurality of processing modules and for transmitting said output data from said plurality of processing modules to said shared memory, said processing bus including variable precision communication means allowing said input and said output data to be of variable precision; and e. an output circuit coupled to said plurality of processing modules for receiving said output data. - View Dependent Claims (15)
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Specification