Charge detection device, a method for producing the same, and a charge transfer and detection apparatus including such a charge detection device

• US 5,464,997 A
• Filed: 08/02/1994
• Issued: 11/07/1995
• Est. Priority Date: 04/01/1994
• Status: Expired due to Term

• Current Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Original Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Inventors: Watanabe, Takashi
• Primary Examiner(s): Munson, Gene M.
• Application Number:
  US08/284,928
• Time in Patent Office: 462 Days
• Field of Search: 257/239, 257/216, 257/218, 257/224, 377/60
• US Class Current: 257/239
• CPC Class Codes: G11C 19/285 Peripheral circuits, e.g. for writing into the first stage; for reading-out of the last stage
• CPC Class Codes: H01L 29/76816 Output structures

Abstract

A charge detection device for converting a signal charge consisting of carriers of a first polarity externally provided into a voltage signals, the charge detection device comprising a MOS transistor, the MOS transistor including: a first semiconductor layer having a transistor channel for carriers of a second polarity; an insulating layer provided on the first semiconductor layer; and a gate electrode provided on the insulating layer, wherein transistor characteristics of the MOS transistor are changed by the signal charge accumulated in a surface region the first semiconductor layer immediately below in interface between the first semiconductor layer and the insulating layer, thereby detecting a quantity of the signal charge.

Claims

1. A charge detection device for converting a signal charge, consisting of carriers of a first polarity, externally provided, into a voltage signal, the charge detection device comprising a MOS transistor, the MOS transistor including:

a semiconductor substrate of a first conductivity type;

a first semiconductor layer having a transistor channel for carriers of a second polarity, the first semiconductor layer being formed in the semiconductor substrate and having a second conductivity type, the carriers of the second polarity being majority carriers of the first semiconductor layer;

an insulating layer provided on the first semiconductor layer; and

a gate electrode provided on the insulating layer,

wherein transistor characteristics of the MOS transistor are changed by the signal charge accumulated in a surface region of the first semiconductor layer immediately below an interface between the first semiconductor layer and the insulating layer, said charge detection device thereby detecting a quantity of the signal charge.

2. A charge detection device according to claim 1, wherein

the MOS transistor further includes a source region, a drain region, and a channel region,

the source region and the drain region are formed in surface regions on the first semiconductor layer and have the second conductivity type, and

the channel region is provided between the source region and the drain region.

3. A charge detection device according to claim 2, wherein:

a reverse bias voltage is applied across the semiconductor substrate and the drain region,

the gate electrode is applied with a prescribed voltage to form a channel potential which accumulates the signal charge at the surface of the channel region and provides a transistor channel below the surface of the channel region, and

the source region is connected to a power source via a load, thereby detecting the quantity of the signal charge.

4. A charge detection device according to claim 2, wherein a path in which the signal charge is transferred and the transistor channel of the MOS transistor run in directions crossing each other, in the state of being isolated from each other in the depth direction.

5. A charge detection device according to claim 2, further comprising

a charge input section, the charge input section including:

a second semiconductor layer provided in a surface region of the first semiconductor layer in contact with the channel region and having the first conductivity; and

an input gate electrode, provided above the second semiconductor layer, with

another insulating layer sandwiched therebetween, for controlling an input of the signal charge to the channel region.

6. A charge detection device according to claim 5, wherein

the drain region includes a first sub-region and a second sub-region opposed to each other,

the first and second sub-regions interpose a portion of the surface region of the first semiconductor layer and the source region is provided between the first and the second sub-regions in a state of isolation from the charge input section.

7. A charge detection device according to claim 5, wherein,

the drain region includes a first sub-region and a second sub-region opposed to each other, the first and said sub-regions interpose a portion of the surface region of the first semiconductor layer,

and the source region is provided at a center of the portion of the surface region.

8. A charge detection device according to claim 7, wherein the gate electrode has a shape surrounding the source region.

9. A charge detection device according to claim 5, wherein:

a reverse bias voltage is applied across the semiconductor substrate and the drain region,

the gate electrode is applied with a prescribed voltage to form a channel potential which accumulates the signal charge at the surface of the channel region and provides a transistor channel below the surface of the channel region, and

the source region is connected to a power source via a load, thereby detecting the quantity of the signal charge in accordance with a timing of applying a voltage with the input gate electrode.

10. A charge detection device according to claim 5, further comprising a reset section, the reset section including:

a third semiconductor layer having the first conductivity type and provided in a surface region of the first semiconductor layer in contact with the channel region and isolated from the second semiconductor layer; and

a reset gate electrode, provided above the third semiconductor, with still another insulating layer sandwiched therebetween.

11. A charge detection device according to claim 10, wherein:

a reverse bias voltage is applied across the semiconductor substrate and the drain region,

the gate electrode is applied with a prescribed voltage to form a channel potential which accumulates the signal charge at the surface of the channel region and provides a transistor channel below the surface of the channel region, and

the source region is connected to a power source via a load, thereby detecting the quantity of the signal charge in accordance with a timing of applying a voltage with the reset Gate electrode.

12. A charge transfer and detection apparatus, comprising:

a charge transfer device for transferring a signal charge, consisting of carriers of a first polarity; and

a charge detection device for converting the signal charge provided by the charge transfer device into a voltage signal, wherein the charge detection device includes a MOS transistor having;

a semiconductor substrate of a first conductivity type;

a first semiconductor layer having a transistor channel for carriers of a second polarity, the first semiconductor layer being formed in the semiconductor substrate and having a second conductivity type, the carriers of the second polarity being majority carriers of the first semiconductor layer;

a insulating layer provided on the first semiconductor layer; and

a gate electrode provided on the insulating layer, and wherein

transistor characteristics of the MOS transistor are changed by the signal charge accumulated in a surface region, of the first semiconductor layer, immediately below an interface between the first semiconductor layer and the insulating layer, said apparatus thereby detecting a quantity of the signal charge.

13. A charge transfer and detection apparatus according to claim 12, wherein the charge transfer device and the charge detection device are provided on a single semiconductor substrate.