Architecture for a computer system used for processing knowledge

• US 5,465,319 A
• Filed: 10/05/1994
• Issued: 11/07/1995
• Est. Priority Date: 11/02/1993
• Status: Expired due to Fees

• Current Assignee: AT&T Corporation (AT&T, Inc.)
• Original Assignee: AT&T Corporation (AT&T, Inc.)
• Inventors: Ahamed, Syed V.
• Primary Examiner(s): MacDonald, Allen R.
• Assistant Examiner(s): Dorvil, Richemond
• Application Number:
  US08/318,582
• Time in Patent Office: 398 Days
• Field of Search: 395/11, 395/51, 395/56, 395/600, 395/54, 395/64, 395/76
• US Class Current: 706/10
• CPC Class Codes: G06F 9/4496 Unification in logic programming

Abstract

The present invention is a knowledge machine method and apparatus for processing information and evolving knowledge. The apparatus includes at least one processor; a knowledge machine including a main memory operatively connected to the processor(s), and a plurality of knowledge machine hardware modules at least indirectly connected to the main memory. The modules include a communication module, a switching module, an administrative module and at least one knowledge base module. There is also hardware, firmware and software in the knowledge machine hardware modules to enable the modules to perform at least the following functions: for the communication module, to control all functional processes of the other modules, the main memory and the processor(s); for the switching module, to select and switch between selected information; for the administrative module, to perform housekeeping functions, including multitasking control with resource allocation, real-time multitasking and scheduling of tasks; for the knowledge base module(s), to operate knowledge processing functions and to store knowledge data banks. In some preferred embodiments, the knowledge processing functions of the knowledge base module may be logical, inductive, associative, inferential and deductive reasoning type functions.

Claims

1. An architecture for a computer system used for processing knowledge, said architecture comprises:

a. a processor;

b. a memory connected to said processor; and

c. a plurality of modules for performing functions for processing knowledge, each function relates to a particular inquiry and involves specific subprocesses, wherein each module is a programmable system of a certain processing power and contains hardware, firmware and software, each module accepts inputs and generate outputs in the processing of said subprocesses, and the plurality of modules include;

i. a knowledge module for storing knowledge in at least one knowledge bank containing data organized in a knowledge hierarchy, and for processing said subprocesses using knowledge functions, wherein said knowledge hierarchy provides links between said data thereby forming a knowledge network, and wherein said knowledge functions are implemented by object oriented tools for establishing relationships between the data in the at least one knowledge bank and for generating the outputs from the established relationships, said knowledge functions being selected from the group consisting of logical, inductive, associative, inferential, and deductive reasoning type functions, and combinations thereof;

ii. a communication module for communicating between said knowledge module and other modules processing said subprocesses, and for organizing said inputs and said outputs of said subprocesses, and for controlling and guiding each subprocess to a specific knowledge bank by organizing said subprocesses according to said data and said knowledge hierarchy of said knowledge module;

iii. an administrative module for performing housekeeping functions involving resource allocation, real-time multitasking and scheduling of said subprocesses, and for providing hardware to said knowledge module to execute the subprocesses; and

iv. a switching module for selecting and switching between said knowledge bank and said administrative module according to said communication module.

2. The architecture of claim 1 wherein said administrative module controls said processor to balance the functioning among said modules according to said processing power of each module such that response time of the computer system is minimized.

3. The architecture of claim 1 wherein said administrative module controls said knowledge module such that said knowledge module performs a portion of said knowledge functions depending upon said knowledge module'"'"'s processing power, the remaining knowledge functions are performed by said administrative module.

4. The architecture of claim 1 wherein said administrative module is integrated with said processor and said memory.

5. The architecture of claim 1 wherein said object oriented tools are implemented in software generated from fourth generation object oriented programming languages and are stored in said memory.

6. The architecture of claim 1 wherein said processor comprises a single processor.

7. The architecture of claim 6 wherein said communication module and said switching module are integrated into a hardware unit.

8. The architecture of claim 7 wherein said hardware unit comprises a disk controller.

9. The architecture of claim 1 wherein said communication module organizes said subprocesses in a perceptive manner to control and guide said subprocesses for solving an inputted knowledge oriented problem.

10. The architecture of claim 1 wherein said administrative module performs housekeeping functions using a "compile-as-you-go" algorithm stored in said memory to progressively process said subprocesses and to generate and integrate partial results of a dynamic search process to generate, modify, amend, and enhance a final result;

and

said communication module outputs the final result to a user.

11. The architecture of claim 1 wherein said administrative module comprises a knowledge profile for providing a user with an index of knowledge stored in said knowledge module.

12. The architecture of claim 11 wherein said knowledge profile verifies that a user presents an inquiry consist with the knowledge stored in said knowledge module.

13. The architecture of claim 1 wherein said processor comprises a multiplicity of processors.

14. The architecture of claim 13 wherein said switching module is between said knowledge module and said communication module.

15. The architecture of claim 1 wherein said data is organized and stored in said memory in said knowledge hierarchy in a format selected from the group consisting of the Dewey Decimal System and the Library of Congress classification format.

16. The architecture of claim 1 wherein said knowledge network is configured in a network selected from the group consisting of a star, a ring, a bus and a dropped bus.

17. The architecture of claim 1 wherein said administrative module performs engineering functions and maintenance functions including updating said knowledge banks and altering said knowledge hierarchy in said knowledge module and modifying the method in which said communication module organizes said inputs and said outputs from said subprocesses.

18. The architecture of claim 1 wherein said administrative module and said knowledge module communicate asymmetrically.

19. The architecture of claim 1 wherein said switching module comprises a plurality of switching modules, wherein at least one switching module corresponds to an individual knowledge module.

20. The architecture of claim 1 wherein said knowledge module only outputs information to said administrative module for use by said administrative module to execute subprocesses to perform said knowledge functions.