Apparatus and method for enhancing transient edge of video signal

• US 5,469,225 A
• Filed: 08/02/1993
• Issued: 11/21/1995
• Est. Priority Date: 08/03/1992
• Status: Expired due to Term

• Current Assignee: Goldstar Jewellery LLC
• Original Assignee: Goldstar Jewellery LLC
• Inventors: Hong, Sung H.
• Primary Examiner(s): Groody, James J.
• Assistant Examiner(s): LEE, MICHAEL
• Application Number:
  US08/101,447
• Time in Patent Office: 841 Days
• Field of Search: 358/166, 358/167, 358/162, 358/160, 358/36, 358/37, 358/96, 358/141
• US Class Current: 348/625
• CPC Class Codes: H04N 5/142 Edging; Contouring

Abstract

An apparatus and a method for enhancing a transient edge of a video signal. The enhancement apparatus comprises a transient edge detecting circuit for first degree-differentiating the video signal inputted therein, comparing an absolute value of the first degree-differentiated video signal with a reference value and detecting the transient edge of the video signal in accordance with the compared result, a transient edge dividing circuit for second degree and third degree-differentiating the absolute value of the first degree-differentiated video signal and outputting the resultant transient edge divide signal, a transient edge interpolating circuit for interpolating a value which is obtained by weighting and averaging start and end pixel values of the transient edge based on a transient edge detection signal from the transient edge detecting circuit into the transient edge of the inputted video signal in an interpolation interval and for replacing start and end pixel values of the transient edge of the inputted video signal with the start and end pixel values of the transient edge based on the transient edge detection signal in a replacement interval, and a mixing circuit for outputting the inputted video signal in a non-transient edge interval and the interpolated or replaced video signal in a transient edge interval.

Claims

1. An apparatus for enhancing a transient edge of a video signal, comprising:

transient edge detecting means for first degree-differentiating said video signal, comparing an absolute value of the first degree-differentiated video signal with a reference value, detecting the transient edge of the video signal in accordance with the compared result and outputting a resultant transient edge detection signal;

transient edge dividing means for second degree-differentiating the absolute value of the first degree-differentiated video signal from said transient edge detecting means, third degree-differentiating the second degree-differentiated value and outputting a resultant transient edge divide signal which is divided into interpolation and replacement intervals;

transient edge interpolating means for interpolating a value which is obtained by weighting and averaging start and end pixel values of the transient edge based on the transient edge detection signal from said transient edge detecting means into the transient edge of said video signal in the interpolation interval of the transient edge divide signal from said transient edge dividing means and for replacing start and end pixel values of the transient edge of said video signal with the start and end pixel values of the transient edge based on the transient edge detection signal from said transient edge detecting means in the replacement interval of the transient edge divide signal from said transient edge dividing means; and

mixing means for outputting said video signal in a non-transient edge interval and the interpolated or replaced video signal from said transient edge interpolating means in a transient edge interval.

2. An apparatus for enhancing a transient edge of a video signal, as set forth in claim 1, wherein said transient edge detecting means includes:

first and second sample memories and an adder connected for first-degree differentiating said video signal;

an absolute value detector for detecting the absolute value of the first degree-differentiated video signal from said first and second sample memories and said adder;

a comparator for comparing the detected absolute value from said absolute value detector with said reference value, checking the presence of the transient edge in said video signal and outputting a resultant transient edge signal;

first and second bit memories and a filter for filtering a noise component of the transient edge signal from said comparator to provide a filtered transient edge signal with a reduced error occurring due to the noise component in detecting the transient edge; and

a transient edge detecting logic circuit for sequentially delaying the filtered transient edge signal filtered from said filter, decoding adjacent bits of the filtered transient edge signal and outputting the transient edge detection signal if the decoded adjacent bits are successively high.

3. An apparatus for enhancing a transient edge of a video signal, as set forth in claim 2, wherein said transient edge detecting logic circuit includes:

a bit delay for sequentially delaying the filtered transient edge signal filtered from said filter; and

a decoder logic unit for decoding the bits of the adjacent transient edge signals from said bit delay and outputting the transient edge detection signal if the decoded signals are successively high.

4. An apparatus for enhancing a transient edge of a video signal, as set forth in claim 1, wherein said transient edge dividing means includes:

first and second sample memories and a first adder connected for second-degree differentiating the absolute value of the first degree-differentiated video signal from said transient edge detecting means; and

third and fourth sample memories and a second adder connected for third-degree differentiating the second degree-differentiated absolute value from said first and second sample memories and said first adder and outputting the resultant transient edge divide signal which is divided into the interpolation and replacement intervals.

5. An apparatus for enhancing a transient edge of a video signal, as set forth in claim 1, wherein said transient edge interpolating means includes:

a video signal delay circuit for delaying said video signal by n clocks to provide said video signal as delayed as an input to said mixing means;

a transient edge divide signal delay circuit for delaying the transient edge divide signal from said transient edge dividing means by n clocks;

a transient edge detection signal delay circuit for delaying the transient edge detection signal from said transient edge detecting means by n clocks;

a start pixel value storage unit for storing the start pixel value of the transient edge based on the transient edge detection signal from said transient edge detecting means;

an end pixel value storage unit for storing the end pixel value of the transient edge based on the transient edge detection signal inverted through a first inverter gate;

a pixel value selecting circuit for selecting one of the start and end pixel values stored in said start pixel value and end pixel value storage units in response to a n clocks delayed transient edge divide signal from said transient edge divide signal delay circuit and a n clocks delayed transient edge detection signal from said transient edge detection signal delay circuit and outputting the selected pixel value to said mixing means;

an interpolation interval storage unit for storing a length of the interpolation interval in response to the transient edge divide signal from said transient edge dividing means and the transient edge detection signal from said transient edge detecting means and generating addresses based on the stored length of the interpolation interval;

first and second ROMs for outputting pixel values for weighting in response to the addresses from said interpolation interval storage unit; and

an interpolation operation unit for weighting the start and end pixel values stored in said start pixel value and end pixel value storage units by the pixel values from said first and second ROMs, respectively, and outputting a resultant value to said mixing means.

6. An apparatus for enhancing a transient edge of a video signal, as set forth in claim 5, wherein said video signal delay circuit includes:

a plurality of sample memories for sequentially delaying said video signal by clocks in the unit of sample,

7. An apparatus for enhancing a transient edge of a video signal, as set forth in claim 5, wherein said transient edge divide signal delay circuit includes:

a plurality of bit memories for sequentially delaying the transient edge divide signal from said transient edge dividing means by clocks in the unit of bit.

8. An apparatus for enhancing a transient edge of a video signal, as set forth in claim 5, wherein said transient edge detection signal delay circuit includes:

a plurality of bit memories for sequentially delaying the transient edge detection signal from said transient edge detecting means by clocks in the unit of bit.

9. An apparatus for enhancing a transient edge of a video signal, as set forth in claim 5, wherein said start pixel value storage unit includes:

a plurality of sample memories for sequentially storing the start pixel value of said video signal corresponding to the transient edge by clocks in response to the transient edge detection signal from said transient edge detecting means whenever the transient edge is started; and

an input signal selecting circuit for selecting a n clocks delayed one of the start pixel values sequentially stored in said sample memories in response to the transient edge detection signal from said transient edge detecting means and the n clocks delayed transient edge detection signal from said transient edge detection signal delay circuit.

10. An apparatus for enhancing a transient edge of a video signal, as set forth in claim 5, wherein said end pixel value storage unit includes:

a plurality of sample memories for sequentially storing the end pixel value of said video signal corresponding to the transient edge by clocks in response to the inverted transient edge detection signal whenever the transient edge is ended; and

an input signal selecting circuit for selecting an clocks delayed one of the end pixel values sequentially stored in said sample memories in response to the inverted transient edge detection signal and the n clocks delayed transient edge detection signal inverted through a second inverter gate.

11. An apparatus for enhancing a transient edge of a video signal, as set forth in claim 9, wherein said input signal selecting circuit includes:

a first point detector for logically combining the transient edge detection signal from said transient edge detecting means to detect a first select point of the pixel value for interpolation or replacement and outputting a resultant first pixel value select point signal;

a second point detector for logically combining the n clocks delayed transient edge detection signal from said transient edge detection signal delay circuit to detect a second select point of the pixel value for interpolation or replacement and outputting a resultant second pixel value select point signal;

a counting controller for controlling a counting operation in response to the first and second pixel value select point signals from said first and second point detectors;

a clock controller for applying a clock in response to the first and second pixel value select point signals from said first and second point detectors;

a counter for up or down counting the clock from said clock controller under the control of said counting controller and outputting a resultant pixel value select control signal; and

a multiplexer for selecting the n clocks delayed one of the start pixel values sequentially stored in said sample memories in response to the pixel value select control signal from said counter and outputting the selected one of said start pixel values as the pixel value for interpolation or replacement.

12. An apparatus for enhancing a transient edge of a video signal, as set forth in claim 11, wherein said first point detector includes:

a bit memory for storing the transient edge detection signal from said transient edge detecting means;

an inverter for inverting an output signal from said bit memory; and

an AND gate for ANDing an output signal from said inverter and the transient edge detection signal from said transient edge detecting means and outputting the ANDed signal as the first pixel value select point signal.

13. An apparatus for enhancing a transient edge of a video signal, as set forth in claim 11, wherein said second point detector includes:

a bit memory for storing the n clocks delayed transient edge detection signal from said transient edge detection signal delay circuit;

an inverter for inverting an output signal from said bit memory; and

an AND gate for ANDing an output signal from said inverter and the n clocks delayed transient edge detection signal from said transient edge detection signal delay circuit and outputting the ANDed signal as the second pixel value select point signal.

14. An apparatus for enhancing a transient edge of a video signal, as set forth in claim 11, wherein said counting controller includes:

a RS flip-flop for controlling the up or down counting of said counter in response to the pixel value select point signals from said first and second point detectors.

15. An apparatus for enhancing a transient edge of a video signal as set forth in claim 11, wherein said clock controller includes:

an exclusive-OR gate for exclusive-ORing the pixel value select point signals from said first and second point detectors and outputting the exclusive-ORed signal as the clock to said counter; and

an AND gate for controlling the output from said exclusive-OR gate.

16. An apparatus for enhancing a transient edge of a video signal, as set forth in claim 5, wherein said pixel value selecting circuit includes:

a switch for selecting one of the start and end pixel values stored in said start pixel value and end pixel value storage units;

a second inverter gate for inverting the n clocks delayed transient edge divide signal from said transient edge divide signal delay circuit; and

an AND gate for ANDing the n clocks delayed transient edge detection signal from said transient edge detection signal delay circuit and an output signal from said second inverter gate and outputting the ANDed signal as a control signal to said switch to allow said switch to select the start pixel value from said start pixel value storage unit at a start point of the transient edge and select the end pixel value from said end pixel value storage unit at an end point of the transient edge.

17. An apparatus for enhancing a transient edge of a video signal, as set forth in claim 5, wherein said interpolation interval storage unit includes:

a first counter for counting the length of the interpolation interval of the transient edge;

a first AND gate for ANDing a system clock, the transient edge divide signal from said transient edge dividing means and the transient edge detection signal from said transient edge detecting means and outputting the ANDed signal as a clock to said first counter;

first to fourth bit memories for sequentially storing an output signal from said first counter;

a second AND gate for ANDing the transient edge divide signal from said transient edge dividing means and the transient edge detection signal from said transient edge detecting means;

an inverter for inverting an output signal from said second AND gate and outputting the inverted signal as a drive signal to said first to fourth bit memories; and

an output signal selecting circuit for selecting a n clocks delayed one of output signals from said first to fourth bit memories as interpolation interval length information in response to the transient edge detection signal from said transient edge detecting means and the n clocks delayed transient edge detection signal from said transient edge detection signal delay circuit and outputting the selected interpolation interval length information as the addresses.

18. An apparatus for enhancing a transient edge of a video signal, as set forth in claim 17, wherein said output signal selecting circuit includes:

a first point detector for logically combining the transient edge detection signal from said transient edge detecting means to detect a first select point of the interpolation interval length information and outputting a first resultant interpolation interval length information select point signal;

a second point detector for logically combining the n clocks delayed transient edge detection signal from said transient edge detection signal delay circuit to detect a second select point of the interpolation interval length information and outputting a second resultant interpolation interval length information select point signal;

a counting controller for controlling a counting operation in response to the first and second interpolation interval length information select point signals from said first and second point detectors;

a clock controller for applying a clock in response to the first and second interpolation interval length information select point signals from said first and second point detectors;

a second counter for up or down counting the clock from said clock controller under the control of said counting controller and outputting a resultant interpolation interval length information select control signal;

a multiplexer for selecting the n clocks delayed one of the output signals from said the first to fourth bit memories as the interpolation interval length information in response to the interpolation interval length information select control signal from said second counter and outputting the selected interpolation interval length information as high order addresses to said first and second ROMs; and

a third counter for performing a counting operation in the interpolation interval of the transient edge and outputting the counted value as low order addresses to said first and second ROMs.

19. An, apparatus for enhancing a transient edge of a video signal, as set forth in claim 18, wherein said first point detector includes:

a fifth bit memory for storing the transient edge detection signal from said transient edge detecting means;

a third inverter gate for inverting an output signal from said fifth bit memory; and

a third AND gate for ANDing an output signal from said third inverter gate and the transient edge detection signal from said transient edge detecting means and outputting the ANDed signal as the first interpolation interval length information select point signal.

20. An apparatus for enhancing a transient edge of a video signal, as set forth in claim 18, wherein said second point detector includes:

a fifth bit memory for storing the n clocks delayed transient edge detection signal from said transient edge detection signal delay circuit;

a third inverter gate for inverting an output signal from said fifth bit memory; and

a third AND gate for ANDing an output signal from said third inverter and the n clocks delayed transient edge detection signal from said transient edge detection signal delay circuit and outputting the ANDed signal as the second interpolation interval length information select point signal.

21. An apparatus for enhancing a transient edge of a video signal, as set forth in claim 18, wherein said counting controller includes:

a RS flip-flop for controlling the up or down counting of said second counter in response to the interpolation interval length information select point signals from said first and second point detectors.

22. An apparatus for enhancing a transient edge of a video signal, as set forth in claim 18, wherein said clock controller includes:

an exclusive OR gate for exclusive-ORing the interpolation interval length information select point signal from the first and second point detectors and outputting the exclusive-ORed signal as the clock to said second counter; and

a third AND gate for controlling the output from said exclusive OR gate.

23. An apparatus for enhancing a transient edge of a video signal, as set forth in claim 5, wherein said mixing means includes:

a multiplexer for selecting appropriate video signals in a non-transient edge interval, the interpolation interval and the replacement interval, respectively, in response to the n clocks delayed transient edge divide signal from said transient edge divide signal delay circuit and the n clocks delayed transient edge detection signal from said transient edge detection signal delay circuit; and

a sample memory for storing the video signal from said multiplexer and then outputting the stored video signal.

24. A method of enhancing a transient edge of an inputted video signal, comprising the steps of:

(a) first degree-differentiating said inputted video signal, detecting an absolute value of the first degree-differentiated inputted video signal to form a first degree-differentiated absolute value and detecting the transient edge of the inputted video signal in accordance with the first degree-differentiated absolute value;

(b) second degree-differentiating the first degree-differentiated absolute value to form a second degree-differentiated absolute value, third degree-differentiating the second degree-differentiated absolute value to form a third degree-differentiated absolute value and dividing the transient edge into interpolation and replacement intervals in accordance with the third degree-differentiated absolute value;

(c) outputting the inputted video signal directly in a non-transient edge interval in which the transient edge is not detected at the step (a) ;

(d) replacing start and end pixel values of the transient edge of the inputted video signal with start and end pixel values of the transient edge detected at the step (a) in the replacement interval of the transient edge divided at the step (b); and

(e) interpolating a value which is obtained by weighting and averaging the start and end pixel values of the transient edge detected at the step (a) into the transient edge of the inputted video signal in the interpolation interval of the transient edge divided at the step (b).