Apparatus and methods for measuring and detecting variations in the value of a capacitor

• US 5,469,364 A
• Filed: 03/15/1993
• Issued: 11/21/1995
• Est. Priority Date: 03/15/1993
• Status: Expired due to Fees

• Current Assignee: Bradley W. Hughey, Liviu Millea, Lucretiu Pisau
• Original Assignee: Bradley W. Hughey, Liviu Millea, Lucretiu Pisau
• Inventors: Pisau, Lucretiu, Millea, Liviu, Hughey, Bradley W.
• Primary Examiner(s): Ramirez, Ellis B.
• Application Number:
  US08/031,809
• Time in Patent Office: 981 Days
• Field of Search: 364/482, 364/483, 324/677, 324/678, 324/676, 178/17 C, 340/501, 200/600
• US Class Current: 702/65
• CPC Class Codes: G01R 27/2605 Measuring capacitance capacitive sensors G01D5/24
• CPC Class Codes: G01R 31/64 Testing of capacitors
• CPC Class Codes: H03K 17/962 Capacitive touch switches

Abstract

A new and improved method for measuring the value of a capacitor and for detecting small variations in the value of a capacitor around a reference value is described. In accordance with the invention, the capacitance of capacitor may be determined by applying a voltage input having a known amplitude and wave form V to an RC circuit having a substantially known or constant load impedance R and sampling the voltage across the resistor or capacitor at a precisely controlled elapsed time interval T. The method now permits improved detector circuits to be created for measuring small variations in value with precision and accuracy. Solid state keypads incorporating sensor cells and software algorithms provide superior human to machine interface systems which are not subject to environmentally induced errors or errors due to component aging.

Claims

1. A method for measuring the value of a capacitor comprising:

(a) providing a capacitor to be measured having a value of capacitance, C;

(b) electrically connecting said capacitor to a detector circuit, said detector circuit including a known load impedance, R, connected in series with said capacitor, means for providing a voltage input, V, of known wave form to said detector circuit, means for measuring an instantaneous sample voltage, v, across a circuit element selected from the load impedance or the capacitor being measured after a known time interval T has elapsed, said sampling moment being in a predetermined fixed phase relationship to the input voltage V and means for precisely controlling said time interval T;

(c) applying said voltage input, V, to said detector circuit and measuring the sample voltage, v, across the circuit element after said time interval T; and

(d) thereafter, computing the value of said capacitor from the value of a single sample v, from said elapsed time interval T, from said known load impedance R, and from said known wave form of the input voltage V.

2. A method as defined in claim 1, further comprising:

(e) temporarily storing the computed value of said capacitor.

3. A method as defined in claim 1, further comprising displaying the computed value of said capacitor.

4. A method as defined in claim 1, wherein said instantaneous sample voltage, v, is measured across said load impedance.

5. A method as defined in claim 1, wherein said instantaneous sample voltage, v, is measured across said capacitor being measured.

10. A method as defined in claim 1, wherein in said detector circuit the load impedance is a substantially resistive load R, said applied input voltage, V, has substantially a step wave form and the value of the capacitor, C, is determined from the equation:

##EQU9##

11. A method as defined in claim 10, wherein the means for measuring the instantaneous sample voltage, v, in said detector circuit comprises an analog to digital (A/D) converter wherein n is the number of bits of said (A/D) converter having a full scale substantially equal to V and k is the digitized value of the sample voltage, v, and the value of the capacitor C is determined from the equation:

##EQU10##

15. A method as defined in claim 1, further comprising the step of conditioning the signal being measured prior to said measuring step.

6. A method for measuring variations in the value of a capacitor comprising:

(a) providing a capacitor to be measured having a generally predetermined value of capacitance, C;

(b) electrically connecting said capacitor to a detector circuit, said detector circuit including a known load impedance, R, connected in series with said capacitor, means for providing a voltage input, V, of known wave form to said detector circuit, means for measuring an instantaneous sample voltage, v, across a circuit element selected from the load impedance or the capacitor being measured after a known time interval T has elapsed, said sampling moment being in a predetermined fixed phase relationship to the input voltage V and means for precisely controlling said time interval T;

(c) applying said voltage input, V, to said detector circuit and measuring the sample voltage, v, across the circuit element after said time interval T;

(d) thereafter, computing the value of said capacitor from the value of a single sample v, from said elapsed time interval T, from said known load impedance R, and from said known wave form of the input voltage V; and

(e) repeating steps (c)-(d) at various times to measure variations in value of the capacitor, if any, with respect to time.

7. A method as defined in claim 6, further comprising:

storing some of the computed values for the capacitor taken over time.

8. A method for detecting variations in the value of a capacitor comprising:

(a) providing a capacitor to be measured having a generally predetermined value of capacitance, C;

(b) electrically connecting said capacitor to a detector circuit, said detector circuit including a substantially constant load impedance, R, connected in series with said capacitor, means for providing a voltage input, V, of known wave form to said detector circuit, means for measuring an instantaneous sample voltage, v, across a circuit element selected from the load impedance or the capacitor being measured after a known time interval T has elapsed, said sampling moment being in a predetermined fixed phase relationship to the input voltage V and means for precisely controlling said elapsed time interval T;

(c) applying said voltage input, V, to said detector circuit and measuring the sample voltage, v, across the circuit element after said elapsed time interval T; and

(d) detecting variations in the value of said capacitor, in excess of an assigned variation amount, from the sample v, from said elapsed time interval T, and from said known wave form of the input voltage V.

9. A method as defined in claim 8, wherein said assigned variation amount is a pre-programmed amount or a dynamically determined amount.

12. A method as defined in claim 8, wherein said load impedance R exhibits dynamic changes in value or exhibits a non-linear impedance characteristic.

13. A method as defined in claim 8, wherein said load impedance R in said detector circuit contains a large capacitive characteristic which creates a capacitive voltage divider in said detector circuit which reduces the maximum possible value of the sample V in relation to the value of the capacitance, C.

14. A method as defined in claim 13, wherein said load impedance R has a relatively large capacitive characteristic which varies in relation to value of the capacitor, C.

16. A method as defined in claim 8, further comprising the step of conditioning the signal being measured prior to said measuring step.

17. A method as defined in claim 8, wherein said variation in the value of said capacitor is represented by a processed numerical resultant representative of a measured per se or of a relational expression of a combination of variables, said variables including v, V, wave form, T and R.

18. A method as defined in claim 17, further comprising saving some processed numerical resultants.

19. A method as recited in claim 18, wherein said voltage input applying step is successively repeated at predetermined intervals of time.

20. A method as recited in claim 19, wherein said predetermined intervals of time are uniform intervals or variable intervals.

21. A method as recited in claim 18, further comprising the step of analyzing said saved numerical resultants with respect to time and identifying trends of changes in said numerical resultants.

22. A method for detecting variations in value of a plurality of capacitors arranged in an array, said method comprising:

(a) providing an array of capacitors to be evaluated, each capacitor in said array having a generally predetermined value of capacitance, C, and having an associated address in said array;

(b) electrically connecting each said capacitor to at least one detector circuit, said detector circuit including a substantially constant load impedance, R, connected in series with said capacitor, means for providing a voltage input, V, of known wave form to said detector circuit, means for measuring an instantaneous sample voltage, v, across a circuit element selected from the load impedance or the capacitor being measured after a known time interval T has elapsed, said sampling moment being in a predetermined fixed phase relationship to the input voltage V and means for precisely controlling said time interval T;

(c) sequentially sampling the value of the capacitor at each address in said array by coupling the capacitor to a said detector circuit, applying the voltage input V in a predetermined sampling order to each capacitor in said array, and measuring the sample voltage, v, after said time interval T;

(d) providing a processed numerical resultant for each sampled value of each capacitor in said array, said processed numerical resultant being representative of a measured variable per se or of a relational expression of a combination of variables, wherein said variables are selected from v, V, wave form,T and R; and

(e) thereafter storing the processed numerical resultant for each address in said array.

23. A method as defined in claim 22, wherein said load impedance R exhibits dynamic changes in value or exhibits a non-linear impedance characteristic.

24. A method as defined in claim 22, wherein said load impedance R in said detector circuit contains a large capacitive characteristic which creates a capacitive voltage divider in said detector circuit which reduces the maximum possible value of the sample V in relation to the value of the capacitance, C.

25. A method as defined in claim 22, wherein said load impedance R has a relatively large capacitive characteristic which varies in relation to value of the capacitor, C.

26. A method as defined in claim 22, further comprising analyzing the stored resultants to identify differences, if any, between the capacitors in said array.

27. A method as defined in claim 22, further comprising repeating the sequential sampling, calculating and storing steps (c)-(e) at intervals of time and saving some of said resultants for each capacitor in said array.

28. A method as defined in claim 27, wherein said intervals of time are selected from regular intervals and variable intervals.

29. A method as defined in claim 27, further comprising analyzing the saved resultants with respect to time and identifying trends with respect to changes in the resultants for each capacitor in the array.

30. A method as defined in claim 29, wherein identified trends for at least one given address in said array are compared to the identified trends of changes in the resultants for at least one other address in said array.

31. A method as defined in claim 30, wherein the identified trends of a particular address are compared with trends of all other addresses within the array.

32. A method as defined in claim 30, wherein the identified trends of a particular address are compared with trends of each of the capacitors disposed in neighboring addresses in said array.

33. A method as defined in claim 30, wherein each capacitor at each address within said array further includes means for conditioning a signal associated with said capacitor and an output of each signal conditioning means is electrically connected to said detector circuit in said connecting step.

34. A method as defined in claim 33, wherein each capacitor output in said array is electrically connected to a single detector circuit, one capacitor at a time, in accordance with said predetermined sequential sampling order.

35. A method as defined in claim 34, further comprising repeating the sequential sampling, calculating and storing steps (c)-(e) at intervals of time and saving some of said resultants for each capacitor in said array.

36. A method as defined in claim 34, further comprising analyzing the saved resultants with respect to time and identifying trends with respect to changes in the resultants for each capacitor in the array.

37. A method as defined in claim 34, wherein identified trends for at least one given address in said array are compared to the identified trends of changes in the resultants for at least one other address in said array.

38. An apparatus for detecting and measuring small variations in the value of at least one capacitor having a generally predetermined value of capacitance, C, said apparatus comprising:

a detector circuit including a substantially constant resistive load impedance, R, connected in series with said capacitor, means for providing a voltage input, V, having substantially a step wave form to said detector circuit, means for measuring an instantaneous sample voltage, v, across said load after a known time interval T has elapsed, said sampling moment being in a predetermined fixed phase relationship to the input voltage V and means for precisely controlling said time interval T;

means for electrically connecting said capacitor being measured to said detector circuit in series with said load, whereby, upon connecting the capacitor to said detector circuit, applying said step voltage input, V, and measuring the instantaneous voltage, v, after elapsed time interval T, the value of the capacitor, C, may be determined in accordance with the formula;

##EQU11##

39. An apparatus as defined in claim 38, wherein said means for measuring the instantaneous voltage, v, comprises an n bit analog-to-digital (A/D) converter circuit having a full scale generally equal to V, wherein n is an integer greater than or equal to 4 and k is a converted digital sample value of the measured instantaneous voltage, v, and the value of C is determined in accordance with the formula:

##EQU12##

40. An apparatus as defined in claim 38, further including a digital control circuit for controlling the voltage input means and the A/D converter circuit for measuring the voltage, v, said digital control circuit comprising a microprocessor.

41. An apparatus as defined in claim 38, wherein said means for precisely controlling said time interval T comprises a precise and stable time base.

42. An apparatus as defined in claim 41, wherein said precision oscillator comprises a quartz crystal element.

43. An apparatus as defined in claim 41, wherein said precision oscillator comprises a ceramic resonator element.

44. An apparatus as defined in claim 41, wherein said means for providing an accurate timing reference has an accuracy of at least about 1000 ppm.

45. An apparatus for detecting variations in the value of capacitors as defined in claim 38, wherein said load impedance R exhibits dynamic changes in value or exhibits a non-linear impedance characteristic.

46. An apparatus for detecting variations in the value of capacitors as defined in claim 38, wherein said load impedance R in said detector circuit contains a large capacitive characteristic which creates a capacitive voltage divider in said detector circuit which reduces the maximum possible value of the sample V in relation to the value of the capacitance, C.

47. An apparatus for detecting variations in the value of capacitors as defined in claim 38, wherein said load impedance R has a relatively large capacitive characteristic which varies in relation to value of the capacitor, C.

48. An apparatus for detecting variations in the value of capacitors as defined in claim 38, further comprising the step of conditioning the signal being measured prior to said measuring step.

49. A method for detecting variations in the value of a capacitor in excess of an assigned variation amount and in the presence of electrical noise comprising:

(a) providing a capacitor to be measured having a generally predetermined reference value of capacitance, C and assigning a first value for said assigned variation amount;

(b) electrically connecting said capacitor to a detector circuit, said detector circuit including a substantially constant load impedance, R, connected in series with said capacitor, means for providing a voltage input, V, of known wave form to said detector circuit, means for measuring an instantaneous sample voltage, v, across a circuit element selected from the load impedance or the capacitor being measured after a known time interval T has elapsed, said sampling moment being in a predetermined fixed phase relationship to the input voltage V and means for precisely controlling said elapsed time interval T;

(c) applying said voltage input, V, to said detector circuit and measuring the sample voltage, v, across the circuit element after said elapsed time interval T;

(d) detecting variations in the value of said capacitor, in excess of an assigned variation amount, from the sample v, from said elapsed time interval T, and from said known wave form of the input voltage V;

(e) sampling the analog electrical input signal, v, and storing a processed numerical resultant representative of that sampled value of said analog input signal;

(f) comparing the difference between the stored numerical resultant obtained in step (e) and said reference value provided in step (a) with said first assigned variation amount;

(g) if the compared values from step (f) for two consecutive sampling steps exceeds the first assigned variation amount thereby identifying that the signal is varying in excess of the assigned variation amount;

(h) thereafter, reducing the value of said first assigned variation amount to a smaller second assigned variation amount;

(i) continuing said comparing steps until two consecutive comparisons for two consecutive sampling steps are greater than said second assigned variation amount and thereby identifying that said analog signal has returned to its normal reference value; and

(j) thereafter, increasing the value of said second assigned variation amount to said first assigned variation amount.

50. A method for detecting variations in value of a plurality of capacitors arranged in an array in excess of an assigned variation amount and in the presence of electrical noise, said method comprising:

(a) providing an array of capacitors to be evaluated, each capacitor in said array having a generally predetermined reference value of capacitance, C, and having an associated address in said array and assigning a first value for said assigned variation amount;

(b) electrically connecting each said capacitor to at least one detector circuit, said detector circuit including a substantially constant load impedance, R, connected in series with said capacitor, means for providing a voltage input, V, of known wave form to said detector circuit, means for measuring an instantaneous sample voltage, v, across a circuit element selected from the load impedance or the capacitor being measured after a known time interval T has elapsed, said sampling moment being in a predetermined fixed phase relationship to the input voltage V and means for precisely controlling said time interval T;

(c) sequentially sampling the value of the capacitor at each address in said array by coupling the capacitor to a said detector circuit, applying the voltage input V in a predetermined sampling order to each capacitor in said array, and measuring the sample voltage, v, after said time interval T;

(d) providing a processed numerical resultant for each sampled value of each capacitor in said array, said processed numerical resultant being representative of a measured variable per se or of a relational expression of a combination of variables, wherein said variables are selected from v, V, wave form,T and R; and

(e) thereafter storing the processed numerical resultant for each address in said array

(f) comparing the difference between the stored numerical resultant obtained in step (e) and the said reference value provided in step (a) with said first assigned variation amount;

(g) if the compared values from step (f) for two consecutive sampling steps exceeds the first assigned variation amount thereby identifying that the signal is varying in excess of the assigned variation amount;

(h) thereafter, reducing the value of said first assigned variation amount to a smaller second assigned variation amount;

(i) continuing said comparing steps until two consecutive comparisons for two consecutive sampling steps are greater than said second assigned variation amount and thereby identifying that said analog signal has returned to its normal reference value; and

(j) thereafter, increasing the value of said second assigned variation amount to said first assigned variation amount.