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Glitchless frequency-adjustable ring oscillator

  • US 5,471,176 A
  • Filed: 06/07/1994
  • Issued: 11/28/1995
  • Est. Priority Date: 06/07/1994
  • Status: Expired due to Term
First Claim
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1. A glitchless frequency adjustable clock generation circuit comprising:

  • a reference clock putting out a stable reference clocking signal,a digital ring oscillator including a series circuit loop of at least one inverting gate, a delay line comprised of plural delays formed of digital transmission gates connected in series in a path between an output and an input of the inverting gate, there being a series of taps along the plurality of digital transmission gates, and a clock output for providing a present, adjustable clocking signal,the programmable delay line comprising at least a first multiplexer for selecting among the series of taps in accordance with a present tap selection value,clock monitoring circuitry connected to compare the clock output with the stable reference clocking signal and to produce a digital clock cycle count for each comparison made,programmed microcontroller means connected to receive the digital clock cycle count and to generate and put out a new tap selection value for controlling tap selection of the first multiplexer as a function of the digital clock cycle count and a desired clock output frequency set point, andsynchronization means connected to the programmed microcontroller means and to the digital ring oscillator for synchronizing and applying the new tap selection value to the first multiplexer in relation to the present, adjustable clocking signal, and to a logical state of a successor, adjustable clocking signal to be put out by the digital ring oscillator following application of the new tap selection value without generating a glitch during multiplexer tap switching.

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