Flash EEPROM array data and header file structure

• US 5,471,478 A
• Filed: 03/10/1995
• Issued: 11/28/1995
• Est. Priority Date: 09/13/1991
• Status: Expired due to Term

• Current Assignee: SanDisk Technologies LLC (Western Digital Corporation)
• Original Assignee: SunDisk Corporation (Seagate Technology Holdings Plc), Western Digital Corporation
• Inventors: Craig, Jeffrey, Gupta, Anil, Mangan, John S., Norman, Robert D., Lofgren, Karl M. J., Albert, Richard, Stai, Jeffrey D.
• Primary Examiner(s): Canney, Vincent P.
• Application Number:
  US08/401,942
• Time in Patent Office: 263 Days
• Field of Search: 371/10.1, 371/10.2, 371/10.3, 365/200
• US Class Current: 714/711
• CPC Class Codes: G06F 11/1068 in sector programmable memories, e.g. flash disk G06F11/1072 takes precedence
• CPC Class Codes: G06F 3/0601 Interfaces specially adapted for storage systems
• CPC Class Codes: G06F 3/0664 at device level, e.g. emulation of a storage device or system
• CPC Class Codes: G11C 16/102 External programming circuits, e.g. EPROM programmers; In-circuit programming or reprogramming; EPROM emulators
• CPC Class Codes: G11C 29/765 in solid state disks

Abstract

A file structure employed in a flash electrically erasable and programmable read only memory ("EEPROM") system and aspects of forming and using certain data fields within such a file structure. An array of rows and columns of EEPROM memory cells is divided into blocks of cells that are separately addressable for the purpose of erasing an entire block of cells at the same time. Each block contains several rows of cells with certain columns thereof storing a sector of data, typically 512 bytes of data, and other columns of cells within the same rows being used as spare cells to replace any defective sector data cells and store overhead (header) information about the block and the data sector. Such overhead information includes pointers to locations of any defective sector data cells within the block, whether the block has been mapped out in favor of another block, error correction codes for the sector data and the header information, and other similar types of information.

Claims

1. A method of operating a non-volatile memory system including an array of floating gate memory cells arranged in rows and columns and characterized by at least one type of defect in a column rendering inoperable all of the cells in that column, comprising:

operating the memory system with the rows of the array separated into unique blocks of cells that are individually addressable for simultaneous erasure of the cells within an addressed block,

maintaining a list identifying any inoperable columns,

designating a plurality of contiguous columns, not including a column on said list, for storage of at least one chunk of overhead data within the individual blocks and designating memory cells of columns other than those designated for overhead data for storage of a plurality of chunks of user data within the individual blocks,

writing user data to and reading user data from memory cells, at least one chunk at a time, of the individual blocks that lie in columns designated for the storage of user data, and

writing overhead data to and reading overhead data from memory cells, at least one chunk at a time, of the individual blocks that lie in columns designated for overhead data, said overhead data including information about the individual blocks themselves or any user data stored therein.

2. The method of claim 1 wherein the writing of user data to and reading user data from memory cells of the individual blocks includes addressing cells within said other columns by reference to said inoperable column list.

3. The method of claim 1 wherein the overhead data written to and read from individual blocks includes a flag that designates whether an addressed block is defective or not.

4. The method of claim 3 wherein the overhead data written to and read from individual blocks includes, when said flag indicates that an addressed block is defective, an address of a substitute block.

5. The method of claim 1 wherein the overhead data written to and read from individual blocks includes a count of a number of times that an addressed block has been erased.

6. The method of claim 1 wherein the overhead data written to and read from individual blocks includes an electrical parameter a previous erase cycle of an addressed block.

7. The method of claim 1 wherein the overhead data written to and read from individual blocks includes an error correction code calculated from the user data stored in memory cells within columns designated for storage of user data.

8. The method of claim 1 wherein the overhead data written to and read from individual blocks includes an error correction code calculated from the overhead data stored in memory cells within columns designated for storage of overhead data.

9. The method of claim 1 wherein the overhead data written to and read from individual blocks includes addresses of any defective cells within columns of respective individual blocks that are designated for storage of user data.

10. A method of formatting a flash EEPROM memory system having floating gate memory cells arranged in a two dimensional array of a plurality of columns and a plurality of rows thereacross, comprising:

grouping the rows of cells into unique blocks of cells which are individually addressable for simultaneous erasure of the cells within an addressed block,

identifying any columns within the array that include a defect and storing a list of such defective columns,

designating a plurality of contiguous cells in the individual rows of the array that do not include a defective column included on said list for receiving a chunk of a plurality of bits of overhead data, and

storing column addresses of said designated chunks, whereby overhead data about the individual blocks and any user data stored therein may be recorded in the chunks.

11. A non-volatile flash EEPROM system, comprising:

an array of floating gate memory cells arranged in rows and columns, the rows being separated into individual blocks that are addressable for erasure together of the memory cells in the individual blocks, and the columns being grouped together into a plurality of unique chunks of memory cells within the individual rows that are each positioned in a plurality of contiguous columns,

means for addressing the individual blocks by designating addresses of the chunks therein,

means for maintaining a list of any defective columns within the array,

means for maintaining an identification of at least one chunk of columns within the array that does not include a defective column noted on said list, and

means for addressing said at least one chunk of columns within the individual blocks for storing overhead data relating to the blocks.