Frequency synthesizer and multiplier circuit arrangement for a radio telephone

• US 5,471,652 A
• Filed: 07/26/1993
• Issued: 11/28/1995
• Est. Priority Date: 07/28/1992
• Status: Expired due to Term

• Current Assignee: Nokia Mobile Phones UK Limited (Nokia Corporation)
• Original Assignee: Nokia Mobile Phones UK Limited (Nokia Corporation)
• Inventors: Hulkko, Jaakko
• Primary Examiner(s): Pham, Chi H.
• Application Number:
  US08/096,864
• Time in Patent Office: 855 Days
• Field of Search: 455/33.1, 455/76, 455/84, 455/86, 455/87, 455/89, 455/112, 455/118, 455/180.2, 455/180.3, 455/188.2, 455/190.1, 455/259, 455/260, 455/183.1, 455/183.2, 379/58, 379/59, 370/29, 370/32, 331/2, 331/74
• US Class Current: 455/76
• CPC Class Codes: H03D 7/16 Multiple-frequency-changing
• CPC Class Codes: H04B 1/005 adapting radio receivers, transmitters andtransceivers for operation on two or more bands, i.e. frequency ranges
• CPC Class Codes: H04B 1/405 with multiple discrete channels
• CPC Class Codes: H04B 1/406 with more than one transmission mode, e.g. analog and digital modes

Abstract

The invention relates to a general purpose circuit arrangement for a radio telephone wherein the universal application possibilities have been provided by phase-locked circuits (PLL1 to PLL3) and by a multiplier circuit (11, 12) that can be controlled (signals Select x1/x2 and Synte sel./Data) by the processor of the mobile telephone. The second harmonic or the fundamental frequency is selected by the multiplier circuit from the VCO oscillators (61, 62). In this way, the frequencies of the synthesizer circuits (UHF1, UHF2, UHF3) can be set independently of each other and according to the requirements of the respective cellular networks. The central circuits are advantageously integrated into four IC circuits (IC1 to IC4).

Claims

1. A circuit arrangement for a radio telephone comprising at least one UHF frequency synthesizer circuit (UHF1, UHF2) and a VHF synthesizer circuit (VHF) each including an output therefrom and an oscillator (71) having a reference frequency output therefrom, said at least one UHF synthesizer circuit and said VHF synthesizer circuit each including a corresponding Phase Locked Loop (PLL) circuit (21, 22) (23) coupled to said oscillator (71) and responsive to said reference frequency output therefrom, multiplier means (11, 12) for frequency multiplying coupled to said output of said at least one UHF synthesizer circuit and responsive to a first control signal (select X1/X2) to change the frequency of a signal output from said multiplier means (11, 12), thereby selectively changing the operational frequency range of the circuit arrangement and an I/Q modulator means (13) responsive to the output of said VHF synthesizer circuit to provide a modulating signal.

2. A circuit arrangement as set forth in claim 1, wherein said output of each frequency synthesizer circuit (UHF1, UHF2, VHF) is selectable in accordance with a second control signal (Synte sel./Data).

3. A circuit arrangement as set forth in claim 1, further comprising:

a reception branch for receiving a radio frequency (RF) signal;

a first mixer (31) connected to said reception branch and responsive to said radio frequency (RF) signal and further connected to said multiplier means and responsive to a first local oscillator (LO) signal therefrom for providing an intermediate frequency (IF) output signal to processing circuits for a reception signal;

a transmission branch including an amplifier means and an antenna, a second mixer (14) for providing an output signal to be transmitted, said second mixer (14) being connected to said I/Q modulator means (13) and connected to said multiplier means and responsive to a second local oscillator signal therefrom, said second mixer (14) having an output signal connected to said transmission branch for amplification by said amplifier means (51) and for transmission as a transmission signal;

whereby frequencies of the first and second local oscillator signals are formed within said at least one UHF and said VHF circuits (UHF1, UHF2, VHF), and whereby the output signal from said second mixer (14) is derived from a frequency formed in the synthesizer circuit (VHF) of the VHF range and modulated by said I/Q modulator means (13).

4. A circuit arrangement as set forth in claim 3, wherein said modulating signal is an analogue modulation signal.

5. A circuit arrangement as set forth in claim 4, further including sources of a second and a third control signal wherein said second mixer (14) is selectable by said third control signal (Feed through) to direct said second local oscillator signal modulated by said analogue modulation signal to a radio frequency transmission frequency straight through said second mixer (14), whereby the operation of the VHF synthesizer circuit (VHF) is rejected by said second control signal (Synte sel./Data).

6. A circuit arrangement as set forth in claim 1, wherein said modulating signal is provided by the I/Q modulator means (13) and said processing circuits (IC4) for said reception signal comprise and I/Q demodulator (42) responsive to said intermediate frequency signal from said first mixer and further comprise a divider circuit responsive to frequencies formed from said VHF synthesizer circuit (VHF) to provide demodulated I and Q output signals.

7. A circuit arrangement as set forth in claim 5, wherein when said reference oscillator (71) has a preselected frequency, the operation of said radio telephone can be set to follow a selected radio telephone standard by a preselected combination of values of the first, second and third control signals (Select x1/x3, Synth sel./Data, Feed through).

8. A circuit arrangement as set forth in claim 3, wherein only one intermediate frequency (IF) is used in said reception branch.

9. A circuit arrangement as set forth in claim 3, comprising first, second, third and fourth integrated circuits (IC1 to IC4), wherein

said first integrated circuit (IC1) substantially comprises said second mixer (14), the I/Q modulator (13), said multiplier means (11, 12) and first amplifier means connected to said multiplier means;

said second integrated circuit (IC2) substantially comprises said corresponding PLL circuits of said at least one UHF and said VHF synthesizer circuits (21 to

     23);

said fourth integrated circuit (IC4) substantially comprises a digital I/Q demodulator (42) or, alternatively, an analogue I/Q demodulator.

10. A radio frequency circuit for a digital mobile telephone comprising a synthesizer means including a UHF range signal synthesizer circuit for providing first and second local oscillator signals and a VHF range signal synthesizer circuit,

a reception branch for receiving a radio frequency signal including a first mixer (31) having a first input connected to said radio frequency signal and a second input connected said first local oscillator signal of said synthesizer means for providing an intermediate frequency output signal, and processing circuits connected to said intermediate frequency output signal of said first mixer;

a transmission branch including a second mixer (14), a source (13) of digital modulating signal selectively connected to said VHF range signal synthesizer, said second mixer (14) having a first input connected to said source (13) of digital modulating signal and a second input connected to said second local oscillator signal of said UHF range signal synthesizer circuit for providing an output RF transmission signal, said second mixer having a third input;

a source of analogue modulating signal selectively connected to said third input of said second mixer; and

wherein said synthesizer means further comprises PLL loop circuits connected to a reference oscillator circuit, a source of control signal, and multiplier means connected to the output of said UHF range synthesizer circuit and to said source of control signal for changing the frequency characteristics of said multiplier means.