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Memory architecture and devices, systems and methods utilizing the same

  • US 5,473,566 A
  • Filed: 09/12/1994
  • Issued: 12/05/1995
  • Est. Priority Date: 09/12/1994
  • Status: Expired due to Term
First Claim
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1. A memory comprising:

  • a plurality of self-contained memory units for storing data;

    a plurality of shift registers, each said shift register including a first parallel data port coupled to a data port of a corresponding one of said self-contained memory units and a serial port;

    interconnection circuitry coupled to a second parallel data port of each said shift register; and

    control circuitry operable to control the exchange of data between a selected one of said memory units and said interconnection circuitry via said parallel ports of said shift register coupled to said selected memory unit and the exchange of data with said selected one of said memory units through said serial port of said shift register coupled to said selected memory unit.

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