Method for fabricating a short channel trenched DMOS transistor

• US 5,474,943 A
• Filed: 08/11/1994
• Issued: 12/12/1995
• Est. Priority Date: 03/15/1993
• Status: Expired due to Term

• Current Assignee: Siliconix Incorporated (Vishay Intertechnology Incorporated)
• Original Assignee: Siliconix Incorporated (Vishay Intertechnology Incorporated)
• Inventors: Hshieh, Fwu-Iuan, Chang, Mike F., Yilmaz, Hamza
• Primary Examiner(s): QUACH, TUAN N
• Application Number:
  US08/289,358
• Time in Patent Office: 488 Days
• Field of Search: 437/203, 437/40, 437/41, 437/44, 437/66, 437/40 DM, 437/41 DM, 437/40 RG, 437/154, 148/DIG. 126, 148/DIG. 103, 257/330, 257/335
• US Class Current: 438/270
• CPC Class Codes: H01L 29/0847 of field-effect transistors with insulated gate H01L29/0653 takes precedence; with a passive supplementary region between source or drain and substrate related to punch-through, capacity or isolation phenomena H01L29/1079; with LDD or DDD structure H01L29/7833; for thin film transistors H01L29/78618
• CPC Class Codes: H01L 29/0869 Shape cell layout H01L29/0696
• CPC Class Codes: H01L 29/1095 Body region, i.e. base region, of DMOS transistors or IGBTs cell layout H01L29/0696
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236
• CPC Class Codes: Y10S 148/103 Mask, dual function, e.g. diffusion and oxidation
• CPC Class Codes: Y10S 438/965 Shaped junction formation

Abstract

A DMOS transistor having a trenched gate is formed in a substrate such that the P body region of the transistor may be formed heavier or deeper while still maintaining a "short" channel. This is accomplished by forming a portion of the N+ type source region within the P body region prior to forming the trench, followed by a second implantation and diffusion of a relatively shallow extension of the N+ source region formed overlying a part of the P body region. The increased depth or doping concentration of the P body region advantageously lowers the resistance of the P body region, while the short channel lowers the on-resistance of the transistor for improved performance.

Claims

1. A method of forming a field effect transistor from a substrate of a first conductivity type comprising the steps of:

forming a body region of a second conductivity type extending into the substrate from a principal surface of the substrate;

forming a source region of a first conductivity type extending into the substrate from the principal surface of the substrate and being of a higher doping concentration than the substrate, the source region being laterally defined by a mask and shallower than the body region with respect to the principal surface;

forming at least one trench in the substrate extending into the substrate from the principal surface, the trench being laterally defined by the same mask and being deeper than the body region with respect to the principal surface; and

after the step of forming the trench reforming the source region by forming an extended portion of the source region laterally along the principal surface of the substrate on either side of the trench, the reformed source region being shallower than the body region with respect to the principal surface and wherein the extended portion of said source region is shallower with respect to the principal surface than a portion of the source region immediately adjacent to the trench, and wherein the step of forming the extended portion of the source region causes diffusion retardation of the body region, thereby shortening a channel length of the transistor.

2. The method of claim 1, wherein a portion of the body region immediately adjacent to the trench has an edge which is sloping such that a portion of the edge immediately adjacent the trench is shallower with respect to the principal surface than is another edge portion of the body region away from the trench.

3. The method of claim 1, further comprising forming a deep body region of second conductivity type extending from a principal surface of the substrate and being of a higher doping concentration than the body region, the deep body region being disposed away from the trench and substantially within the body region.

4. The method of claim 1, further comprising the step of forming a deep body region of the second conductivity type and lying within the body region, and spaced from the trench.

5. The method of claim 1, further comprising the step of forming a deep body region of second conductivity type extending from a principal surface of the substrate and being of a higher doping concentration than the body region, the deep body region being disposed away from the trench and within the body region.

6. A method of forming a field effect transistor from a substrate of a first conductivity type comprising the steps of:

forming a tub region of a second conductivity type extending into the substrate from a principal surface of the substrate;

forming a source region of a first conductivity type extending into the substrate from the principal surface of the substrate and being of a higher doping concentration than the substrate, the source region being laterally defined by a mask;

forming at least one trench in the substrate extending into the substrate from the principal surface, the trench laterally defined by the same mask and being deeper than the source region with respect to the principal surface;

forming a body region of the second conductivity type extending from the principal surface of the substrate and being of less depth than the tub region; and

after the step of forming the trench reforming the source region by forming an extended portion of the source region laterally along the principal surface of the substrate on either side of the trench, the reformed source region being shallower than the body region with respect to the principal surface and wherein the extended portion of said source region is shallower with respect to the principal surface than is a portion of the source region immediately adjacent to the trench, and wherein the step of forming the extended portion of the source region causes diffusion retardation of the body region, thereby shortening a channel length of the transistor.