Pattern inspection apparatus with corner rounding of reference pattern data

• US 5,475,766 A
• Filed: 09/04/1992
• Issued: 12/12/1995
• Est. Priority Date: 09/05/1991
• Status: Expired due to Term

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Takanashi, Masao, Watanabe, Toshiyuki, Tsuchiya, Hideo, Hideshima, Masayuki
• Primary Examiner(s): NOT, DEFINED
• Assistant Examiner(s): Prikockis, Larry J.
• Application Number:
  US07/941,197
• Time in Patent Office: 1,194 Days
• Field of Search: 382/8, 382/48, 382/25, 382/22, 348/87, 348/126, 348/133
• US Class Current: 382/144
• CPC Class Codes: G01N 21/8851 Scan or image signal processing specially adapted therefor, e.g. for scan signal adjustment, for detecting different kinds of defects, for compensating for structures, markings, edges G01N21/8806 and G01N21/93 - G01N21/95692 take precedence; optical measurement of dimensions G01B11/00; optical scanning G02B26/10; image transformation G06T3/00; computerised image enhancement G06T5/00; image processing per se for flaw detection G06T7/0002
• CPC Class Codes: G01N 21/95607 using a comparative method
• CPC Class Codes: G06T 2207/30121 CRT, LCD or plasma display
• CPC Class Codes: G06T 2207/30148 Semiconductor; IC; Wafer
• CPC Class Codes: G06T 7/001 using an image reference approach

Abstract

A pattern inspection apparatus for comparing/collating a test target pattern with a corresponding design pattern to detect the presence/absence of a defect which is present in the test target pattern includes a bit pattern generating circuit for developing the data of the design pattern into bits, a corner pattern detector for scanning a corner pattern detection window having a predetermined range with respect to reference pattern data as a reference of a pattern obtained by bit development performed by the bit pattern generating circuit to extract a contour pattern, and detecting a corner pattern to be subjected to corner rounding processing on the basis of the extracted contour pattern, a memory for storing predetermined change information corresponding to the corner detected by the corner pattern detector, a graphic pattern synthesizing circuit for changing a graphic pattern in accordance with the information in the memory, and a comparing circuit for comparing reference pattern data, obtained by rounding processing performed on the basis of the reference pattern data and the feature of the corresponding pattern, with test pattern data obtained from the test target pattern, and further includes a pattern correcting circuit constituted by an excessive rounding detector for detecting and correcting an inadequate excessive rounding operation, and a pattern changing circuit for changing the pattern data in accordance with the excessive rounding detection result.

Claims

1. A pattern inspection apparatus for comparing/collating test target pattern data obtained from a test target pattern with design pattern data of the pattern to detect the presence/absence of a defect which is present in a test target pattern, comprising:

pattern generating means for developing data of a design pattern corresponding to the test target pattern into bits, corner rounding means for performing corner rounding processing with respect to reference pattern data obtained by the pattern generating means, and comparing means for comparing second reference pattern data which is obtained by rounding the reference pattern data on the basis of the reference pattern data and a feature of the corresponding pattern, with the test pattern data obtained from the test target pattern,

said corner rounding means including;

a corner pattern detector for scanning a corner pattern detection window having a predetermined range with respect to the reference pattern data, obtained by bit development performed by said pattern generating means, to extract a contour pattern in said window in the range, and detecting a corner pattern to be subjected to corner rounding processing in accordance with the extracted contour pattern,

a masking pattern data generator for generating masking pattern data corresponding to the corner pattern detected by said corner pattern detector, and

a graphic pattern synthesizing circuit for synthesizing graphic pattern data using the detected corner pattern in the reference pattern data with masking pattern data corresponding to the graphic pattern data, thereby rounding a corner portion of the reference pattern data;

wherein said comparing means compares the second reference pattern data, obtained by said graphic pattern synthesizing circuit, with the test pattern data using a predetermined threshold value level,

said corner pattern detector comprises a contour portion determining circuit for scanning said corner pattern detection window to independently test a contour pattern in said window, and an internal portion determining circuit for independently testing an internal pattern in said window excluding the contour portion; and

a logical operation is performed by said corner pattern detector on the basis of a test result obtained by said contour pattern determining circuit and a test result obtained by said internal portion determining circuit to test/determine whether the test target pattern data coincides with the reference pattern data.

2. A pattern inspection apparatus for comparing/collating test target pattern data obtained from a test target pattern with design pattern data of the pattern to detect the presence/absence of a defect which is present in a test target pattern, comprising:

pattern generating means for developing data of a design pattern corresponding to the test target pattern into bits, corner rounding means for performing corner rounding processing with respect to reference pattern data obtained by the pattern generating means, and comparing means for comparing second reference pattern data which is obtained by rounding the reference pattern data on the basis of the reference pattern data and a feature of the corresponding pattern, with the test pattern data obtained from the test target pattern,

said corner rounding means including;

a corner pattern detector for scanning a corner pattern detection window having a predetermined range with respect to the reference pattern data, obtained by bit development performed by said pattern generating means, to extract a contour pattern in said window in the range, and detecting a corner pattern to be subjected to corner rounding processing in accordance with the extracted contour pattern,

a masking pattern data generator for generating masking pattern data corresponding to the corner pattern detected by said corner pattern detector, and

a graphic pattern synthesizing circuit for synthesizing graphic pattern data using the detected corner pattern in the reference pattern data with masking pattern data corresponding to the graphic pattern data, thereby rounding a corner portion of the reference pattern data;

wherein said masking pattern data generator comprises at least one storage table for storing/holding a plurality of pattern shapes as the masking pattern data,

an arbitrary pattern shape is selected from said storage table in accordance with a command from a predetermined controller, and

a rounded shape of a corner is changed in accordance with a selected arbitrary pattern shape.

3. The apparatus according to claim 2, wherein said corner pattern detector comprises:

a vertex determining section for testing bits located at predetermined four corners of a pattern in the range of said corner pattern detection window,

a side determining section for testing a bit group corresponding to a side of the pattern, and

a corner determining section for testing on the basis of test results obtained by said vertex determining section and said side determining section whether the pattern is a corner.

4. The apparatus according to claim 2, wherein said corner rounding means can change a maximum bit count of a mask for corner rounding processing by selectively switching a plurality of pattern detection window circuits, each of which defines a maximum bit count of a mask in advance, in accordance with a predetermined command from a predetermined controller.

5. The apparatus according to claim 2, wherein said corner rounding means further comprises a buffer circuit for temporarily storing a portion of said reference pattern data having a predetermined width as first stripe data

the first stripe data being added to second stripe data subsequently input to said buffer circuit to form added stripe data which is input to said corner pattern detector.

6. A pattern inspection apparatus for comparing/collating test target pattern data obtained from a test target pattern with design pattern data of the pattern to detect the presence/absence of a defect which is present in a test target pattern, comprising:

pattern generating means for developing data of a design pattern corresponding to the test target pattern into bits, corner rounding means for performing corner rounding processing with respect to reference pattern data obtained by the pattern generating means, and comparing means for comparing second reference pattern data which is obtained by rounding the reference pattern data on the basis of the reference pattern data and a feature of the corresponding pattern, with the test pattern data obtained from the test target pattern,

said corner rounding means including;

a corner pattern detector for scanning a corner pattern detection window having a predetermined range with respect to the reference pattern data, obtained by bit development performed by said pattern generating means, to extract a contour pattern in said window in the range, and detecting a corner pattern to be subjected to corner rounding processing in accordance with the extracted contour pattern,

a masking pattern data generator for generating masking pattern data corresponding to the corner pattern detected by said corner pattern detector, and

a graphic pattern synthesizing circuit for synthesizing graphic pattern data using the detected corner pattern in the reference pattern data with masking pattern data corresponding to the graphic pattern data, thereby rounding a corner portion of the reference pattern data;

wherein said corner pattern detector comprises a first latch group having a function of latching said reference pattern data, and a memory connected to said first latch group and having a function of storing masking pattern data,

said masking pattern data generator comprises said memory having the function of storing masking pattern data, a second latch group connected to said memory and having a function of latching output data from said memory, and an OR gate group connected to said memory and said second latch group, and

said graphic pattern synthesizing circuit comprises an exclusive-OR gate group.

7. A pattern inspection apparatus comprising:

bit pattern generating means for generating reference pattern data by bit development of a design pattern into bits;

corner rounding means for selecting a corner portion of said reference pattern data obtained by bit development performed by said bit pattern generating means, and performing corner rounding processing with respect to the corner portion to generate corner-rounded data; and

comparing means for comparing said corner-rounded data obtained by rounding processing with test pattern data of a test target pattern,

said corner rounding means including

a corner pattern detector for detecting a corner pattern by scanning a corner pattern detection window with respect to the reference pattern data,

a masking pattern data generator for generating masking pattern data corresponding to the corner pattern detected by said corner pattern detector, and

a graphic pattern synthesizing circuit for synthesizing graphic pattern data including the detected corner pattern in the reference pattern data with masking pattern data corresponding to the graphic pattern data, thereby rounding a corner portion of the reference pattern data, and

said pattern inspection apparatus further comprising;

corner-rounded pattern correcting means constituted by an excessive rounding detector for detecting an excessive rounding state, which is caused when corner rounding processing is performed with respect to a plurality of adjacent corners, by scanning the reference pattern data and corresponding masking pattern data, and

a masking pattern changing circuit for changing a masking pattern in accordance with a test result obtained by said excessive rounding detector.

8. The apparatus according to claim 7, wherein said excessive rounding detector comprises:

a masking pattern adjacency detection window circuit for scanning a window with respect to a masking pattern corresponding to the reference pattern data to detect a position adjacent to the masking pattern, thereby detecting adjacency and a type of adjacency of the masking pattern,

an edge detection window circuit for detecting an edge by scanning an edge detection window having a predetermined range with respect to reference pattern data input from said bit pattern generating means, and

a masking pattern inhibiting bit pattern generator connected to said masking pattern adjacency detection window circuit and said edge detection window circuit for generating a masking pattern inhibiting bit pattern in accordance with a test result from said excessive rounding detector, and

said masking pattern changing circuit changes the masking pattern into a predetermined masking pattern by removing partial masking pattern data in which the masking pattern inhibiting bit pattern generated by said masking pattern inhibiting bit pattern generator is present.

9. The apparatus according to claim 8, wherein said masking pattern changing circuit performs table conversion by using a memory which outputs said predetermined masking pattern based upon said masking pattern being input to said masking pattern changing circuit.

10. The apparatus according to claim 8, further comprising a masking pattern memory connected to said masking pattern adjacency detection window circuit and said masking data pattern generator for storing masking pattern data having a predetermined width, said masking pattern data and a succeeding stripe data of current first masking pattern data being consecutively input to said excessive rounding detector, and

means for adding the first masking pattern data having the predetermined width stored in said masking pattern memory to subsequently input second masking pattern data to obtain resultant data, wherein the resultant data is input to said excessive rounding detector.

11. The apparatus according to claim 7, further comprising a stripe memory for storing stripe data, required for said corner rounding means and a distribution function calculator, and

wherein said distribution function calculator performs weighting/addition and multivalue conversion of the design data by using a point spread function representing a resolution of a predetermined testing optical system, thereby forming desired reference data.

12. The apparatus according to claim 11, wherein said stripe memory stores stripe data having a predetermined width, as first stripe data which is adjacent to subsequently input second stripe data of consecutively input reference pattern data, said apparatus further comprising:

means for adding first stripe data having the predetermined width stored in said stripe memory to the second stripe data to obtain resultant data, and inputting the resultant data to said corner pattern detector wherein

first data from said masking pattern data generator, second data from said pattern correcting means, and third data from said graphic pattern synthesizing circuit are arranged into an array having a width obtained by adding a predetermined width to a width of said first, second and third data, and corner rounding processing and correction processing is performed throughout a range not less than a data width of the stripe data.

13. The apparatus according to claim 7, wherein said excessive rounding detector comprises:

a masking pattern adjacency detection window circuit which detects, every time masking pattern data is input, by using a masking pattern adjacency detection template, whether the template coincides with input pattern, and sets a masking pattern code indicating the masking pattern coinciding with the template, and a first flag indicating coincidence, if the template and the input pattern coincide with each other,

an edge detection window circuit which detects, every time a stripe pattern is input, by using an edge pattern detection template, whether the template coincides with the input pattern, and sets an edge pattern code indicating the edge pattern coinciding with the template, and a second flag indicating coincidence, if the template and the input pattern coincide with each other, and

a masking pattern inhibiting bit pattern generator which tests the masking pattern code and the edge pattern code when the first flag and the second flag are set, and generates a masking pattern inhibiting bit pattern in accordance with the masking pattern and edge pattern codes if the masking pattern and edge pattern codes constitute a predetermined combination, the masking pattern inhibiting bit pattern comprising first type data indicating positions of bits to be inhibited, in the masking patterns, and second type data indicating other positions of bits.

14. The apparatus according to claim 7, wherein said corner-rounded pattern correcting means comprises:

a masking latch group serving as a masking pattern shift register,

a stripe data latch group serving as a stripe pattern shift register,

a shift clock generator, connected to said latch groups, for driving said latch groups,

a ROM for generating a masking pattern inhibiting bit pattern on the basis of bit pattern data supplied from each of said latch groups,

a masking pattern inhibiting bit pattern latch group, connected to output of said ROM, serving as a second masking pattern shift register for temporarily holding the masking pattern inhibiting bit pattern to cause the bit pattern to synchronize with an original masking pattern,

an OR gate group connected to said inhibiting bit pattern latch group in a predetermined manner for performing predetermined correction processing with respect to an input pattern which requires corner-rounded pattern correction of adjacent corners which are separately detected, and

an AND gate group, connected to said inhibiting bit pattern latch group, for further performing predetermined correction processing with respect to the corrected pattern.