Digital quadrature amplitude and vestigial sideband modulation decoding method and apparatus

• US 5,477,199 A
• Filed: 10/07/1994
• Issued: 12/19/1995
• Est. Priority Date: 04/05/1994
• Status: Expired due to Term

• Current Assignee: Cisco Technology, Inc. (Cisco Systems, Inc.)
• Original Assignee: Scientific-Atlanta Incorporated (Cisco Systems, Inc.)
• Inventors: Montreuil, Leo
• Primary Examiner(s): Grimm, Siegfried H.
• Application Number:
  US08/319,694
• Time in Patent Office: 438 Days
• Field of Search: 329/304, 329/306, 329/307, 329/308, 329/309, 329/310, 329/357, 332/103, 332/104, 348/638, 348/639, 348/641, 348/642, 348/726, 348/727, 375/261, 375/298, 375/301, 375/321, 375/324, 455/47, 455/109, 455/204
• US Class Current: 332/103
• CPC Class Codes: H03C 3/04 Means in or combined with modulating stage for reducing amplitude modulation
• CPC Class Codes: H03C 3/40 using two signal paths the outputs of which have a predetermined phase difference and at least one output being amplitude-modulated
• CPC Class Codes: H03D 1/2245 using two quadrature channels H03D1/2209 takes precedence
• CPC Class Codes: H03D 1/2254 and a phase locked loop
• CPC Class Codes: H03D 2200/0031 PLL circuits with quadrature locking, e.g. a Costas loop
• CPC Class Codes: H03D 3/007 by converting the oscillations into two quadrature related signals H03D3/245 takes precedence
• CPC Class Codes: H03D 3/245 using at least twophase detectors in the loop H03D3/244 takes precedence; in general H03L7/087
• CPC Class Codes: H04L 27/0008 arrangements for allowing a transmitter or receiver to use more than one type of modulation negotiating modulation type for two-way transmission paths H04L5/1453
• CPC Class Codes: H04L 27/02 Amplitude-modulated carrier systems, e.g. using on-off keying; Single sideband or vestigial sideband modulation H04L27/32 takes precedence
• CPC Class Codes: H04L 27/38 Demodulator circuits; Receiver circuits
• CPC Class Codes: H04L 27/3836 in which the carrier is recovered using the received modulated signal or the received IF signal, e.g. by detecting a pilot or by frequency multiplication
• CPC Class Codes: H04N 21/426 Internal components of the client ; Characteristics thereof H04N5/44 takes precedence

Abstract

A synchronous detector for demodulating and decoding a digital data signal modulated either according to a vestigial sideband or a quadrature amplitude modulation scheme is based upon the principle of recognizing that a vestigial sideband signal may be regarded and treated as an offset-keyed QAM signal. The detector comprises a tuner for tuning to a center frequency symmetrically displaced within the transmitted digital data signal frequency spectrum and a decoder circuit selectively operating to reconstruct the transmitted digital data stream according to the duration of a transmitted data symbol. A related method of demodulating and decoding a modulated digital data stream comprises analogous steps of tuning to a center carrier frequency and selectively switching between in phase and quadrature arms of the demodulator such that the switch resides in one position or the other for a duration equal to half the duration of a transmitted data symbol. A related modulator for modulating a digital data signal either according to a vestigial sideband or quadrature amplitude modulation scheme comprises a switch for selectively switching an input digital data signal between real and imaginary arms and a modulator for modulating at center frequency. In one modulator embodiment, a noise cancellation circuit may be coupled between the real and imaginary arms.

Claims

1. A synchronous detector for recovering a demodulated output digital data signal from a transmitted input digital data signal regardless of whether the transmitted input digital data stream is modulated according to a vestigial sideband or a quadrature amplitude modulation scheme, the synchronous detector comprising

a tuner tuned to a center carrier frequency of a modulated data spectrum, the tuner comprising real and imaginary arms and

a decoder for receiving digital data sequences from the real and imaginary arms, the decoder selectively operating according to the duration of a transmitted data symbol.

2. A synchronous detector according to claim 1 wherein the center carrier frequency of the modulated data spectrum comprises the frequency value of the center of symmetry of the transmitted information amplitude versus frequency spectrum.

3. A synchronous detector according to claim 1,

the real and imaginary arms each comprising a mixer, an analog to digital converter coupled to the mixer and a data slicer for outputing in phase and quadrature digital data sequences respectively.

4. A synchronous detector according to claim 3,

the real and imaginary arms each further comprising a Nyquist filter coupled to the outputs of the respective analog to digital converters for filtering the respective digital signals to be provided to the respective data slicers.

5. A synchronous detector according to claim 1,

the decoder particularly comprising a two position switch for switching between an output of the real arm and an output of the imaginary arm, the switch remaining in each position for a duration 0.5T equal to one half the duration T of the transmitted data symbol.

6. A synchronous detector according to claim 5,

the switch switching to the real arm position at time t equal to T, 2T, 3T and so on and switching to the imaginary arm position at time t equal to 0.5T, 1.5T, 2.5T and so on.

7. A modulator for modulating a digital data stream according to either a VSB or QAM modulation scheme, the modulator comprising

a control circuit for alternately switching an input digital data stream to be modulated between a real arm and an imaginary arm and

a modulator for modulating the digital data stream such that the carrier frequency is approximately symmetrically centered about the modulated data amplitude versus frequency spectrum.

8. The modulator according to claim 7,

the control circuit comprising a switch for switching between the real and imaginary arms such that the switch is connected to one or the other arm for a duration of one half the duration of a transmitted data symbol.

9. The modulator according to claim 8,

the switch being connected to the real arm at time t equal to T, the duration of one symbol, 2T, 3T and so on and being connected to the imaginary arm at time t equal to 0.5T, 1.5T, 2.5T and so on.

10. The modulator according to claim 7,

the real and imaginary arms each comprising a Nyquist filter and a mixer.

11. The modulator according to claim 7 further comprising a cancellation circuit coupled between the real and imaginary arms.

12. The modulator according to claim 11, the cancellation circuit comprising a jitter cancellation filter, a scaling circuit for scaling the output of the filter according to a factor k, which may comprise a resistor or an amplifier, and a summation circuit for summing the scaled output of the scaling circuit with the output of an imaginary arm filter.

13. A method of demodulating and decoding a digital data stream modulated according to either a vestigial sideband or a quadrature amplitude modulation scheme, the method comprising the steps of

tuning in each of an in phase and a quadrature arm of a demodulator to a center frequency of the modulated data spectrum and

reconstructing the digital data stream according to the symbol rate of the transmitted digital data stream.

14. A method of demodulating and decoding a digital data stream according to claim 13 wherein the digital data stream reconstruction step comprises the steps of converting the output of a mixer in each arm to a digital signal and deciding whether the recovered signal exceeds a predetermined threshold.

15. A method of demodulating and decoding a digital data stream according to claim 13 wherein the digital data stream reconstruction step comprises the step of switching between in phase and quadrature arms according to half the duration of a transmitted data symbol.

16. A method of demodulating and decoding a digital data stream according to claim 13 further comprising the step of

subtracting transmitted carrier signal from a received signal.

18. A method of modulating a digital data signal according to claim 15 further comprising the step of

canceling phase noise between the real and imaginary arms.

17. A method of modulating a digital data signal according to either a vestigial sideband or quadrature amplitude modulation scheme comprising the steps of

switching to real and imaginary arms of a modulator according to the duration of a transmitted data symbol and

modulating the digital data stream about a carrier frequency symmetrically centered in the modulated digital data signal spectrum.