Thermal isolation of hybrid thermal detectors through an anisotropic etch

• US 5,478,242 A
• Filed: 04/29/1994
• Issued: 12/26/1995
• Est. Priority Date: 04/29/1994
• Status: Expired due to Term

• Current Assignee: L-3 Communications Corporation (L3Harris Technologies, Inc.)
• Original Assignee: Texas Instruments, Inc.
• Inventors: Hanson, Charles M., Meissner, Edward G., Owen, Robert A., Shelton, Gail D., Kyle, Robert J. S., Frank, Steven N., Walker, William K.
• Primary Examiner(s): Picardat, Kevin M.
• Application Number:
  US08/236,778
• Time in Patent Office: 606 Days
• Field of Search: 437/3, 437/4, 437/6, 437/183, 437/189, 437/947, 257/79, 257/80, 257/81, 257/82
• US Class Current: 438/55
• CPC Class Codes: H01L 27/1465 of the hybrid type
• CPC Class Codes: H10N 15/10 Thermoelectric devices using thermal change of the dielectric constant, e.g. working above and below the Curie point

Abstract

A thermal isolation structure (10) is disposed between a focal plane array and an integrated circuit substrate (12). The thermal isolation structure (10) includes a mesa-type formation (16) and a mesa strip conductor (18, 26) extending from the top of the mesa-type formation (16) to an associated contact pad (14) on the integrated circuit substrate (12). After formation of the mesa-type formation (16) and the mesa strip conductor (18, 26), an anisotropic etch using the mesa strip conductor (18, 26) as an etch mask removes excess mesa material to form trimmed mesa-type formation (24) for improved thermal isolation. Bump bonding material (20) may be deposited on mesa strip conductor (18, 26) and can also be used as an etch mask during the anisotropic etch. Thermal isolation structure (100) can include mesa-type formations (102), each with a centrally located via (110) extending vertically to an associated contact pad (104) of integrated circuit substrate (106). A conductor (108) is deposited on top of mesa-type formation (102), along the walls of via (110), and overlying contact pad (104). An anisotropic etch using the conductor (108) as an etch mask removes excess mesa material (118) for improved thermal isolation.

Claims

1. A method for fabricating a thermal isolation structure disposed between a focal plane array and an integrated circuit substrate of a hybrid thermal detection system, comprising the steps of:

providing the focal plane array with at least three thermal sensors for generating a sensor signal output representative of the thermal radiation incident to the focal plane array;

providing the integrated circuit substrate with at least three contact pads for coupling to the focal plane array;

forming at least three mesa-type formations from a thermally insulating material, the mesa-type formations projecting adjacent to the contact pads of the integrated circuit substrate;

forming at least three mesa strip conductors extending from the top of the mesa-type formations to the contact pads of the integrated circuit substrate, each mesa strip conductor coupling at least one of the thermal sensors in the focal plane array to an associated contact pad of the integrated circuit substrate; and

anisotropically etching the mesa-type formations using the mesa strip conductors as an etch mask.

2. The method of claim 1, and further comprising the step of forming bump-bonding material on the mesa strip conductors, wherein the mesa strip conductors and the bump-bonding material are used as an etch mask for the step of anisotropically etching.

3. The method of claim 1, wherein the step of anisotropically etching is performed using an angled etch while rotating the mesa-type formations.

4. The method of claim 1, wherein the mesa strip conductors are formed from a titanium/tungsten alloy.

5. The method of claim 1, wherein the step of anisotropically etching is performed using an oxygen-based reactive ion etch.

6. The method of claim 1, wherein the step of forming the mesa-type formations is performed using a photolithographic process.

7. A method for fabricating a thermal isolation structure disposed between a focal plane array and an integrated circuit substrate of a hybrid thermal detection system, comprising the steps of:

providing the focal plane array with at least three thermal sensors for generating a sensor signal output representative of the thermal radiation incident to the focal plane array;

providing the integrated circuit substrate with at least three contact pads for coupling to the focal plane array;

coating the integrated circuit substrate with a mesa material;

anisotropically etching the mesa material to form at least three vias through the mesa material, the vias terminating at the respective contact pads of the integrated circuit substrate;

forming at least three conductors extending from the surface of the mesa material through the vias to the contact pads of the integrated circuit substrate;

patterning the portion of the conductors formed on the surface of the mesa material; and

anisotropically etching the mesa material using the patterned conductors as an etch mask to form at least three mesa-type formations, each mesa-type formation supporting an associated conductor, each conductor operable to couple at least one of the thermal sensors in the focal plane array to an associated contact pad of the integrated circuit substrate.

8. The method of claim 7, and further comprising the step of forming bump-bonding material on each conductor, wherein the conductor and the bump-bonding material cooperate to provide an etch mask for the step of anisotropically etching to form the mesa-type formations.

9. The method of claim 7, wherein the step of anisotropically etching to form the mesa-type formations is performed using an angled etch while rotating the mesa-type formations.

10. The method of claim 7, wherein the step of forming the conductors is performed using a conformal deposition technique.

11. The method of claim 7, wherein the step of anisotropically etching to form the mesa-type formations is performed using an oxygen-based reactive ion etch.

12. The method of claim 7, wherein the step of patterning the conductors comprises forming at least three circular bonding areas disposed respectively over the vias.