ATM cell interface and method for dispatching an ATM cell

• US 5,479,401 A
• Filed: 06/17/1994
• Issued: 12/26/1995
• Est. Priority Date: 08/14/1992
• Status: Expired due to Term

• Current Assignee: Ericsson AB (Telefonaktiebolaget LM Ericsson)
• Original Assignee: FORE Systems, Inc. (Cornhill Corp. Holdings LLP)
• Inventors: Sansom, Robert D., Cooper, Eric C., Menzilcioglu, Onat, Bitz, Francois J.
• Primary Examiner(s): Chin, Wellington
• Application Number:
  US08/261,427
• Time in Patent Office: 557 Days
• Field of Search: 370/60, 370/60.1, 370/94.1, 370/94.2, 370/110.1
• US Class Current: 370/397
• CPC Class Codes: H04L 12/4608 LAN interconnection over ATM networks
• CPC Class Codes: H04L 2012/5617 Virtual LANs; Emulation of LANs
• CPC Class Codes: H04L 2012/5665 Interaction of ATM with other protocols
• CPC Class Codes: H04L 45/742 Route cache; Operation thereof
• CPC Class Codes: H04L 49/253 using establishment or release of connections between ports
• CPC Class Codes: H04L 49/256 Routing or path finding in ATM switching fabrics
• CPC Class Codes: H04L 49/3009 Header conversion, routing tables or routing tags
• CPC Class Codes: H04L 49/3081 ATM peripheral units, e.g. policing, insertion or extraction
• CPC Class Codes: H04L 49/309 Header conversion, routing tables or routing tags
• CPC Class Codes: H04L 49/555 Error detection
• CPC Class Codes: H04Q 11/0478 Provisions for broadband connections
• CPC Class Codes: Y10S 370/905 Asynchronous transfer mode, ASN
• CPC Class Codes: Y10S 370/911 Bridge, e.g. brouter, bus extender

Abstract

An ATM cell interface for dispatching an ATM cell having a header. The interface is comprised of N input ports, where N≧1 and is an integer. The cell is also comprised of a table lookup mechanism that directs a cell from an input port to any desired destination. The table lookup mechanism has entries which identify desired destination for corresponding cells. The number of possible entries in the table lookup mechanism is less than a total number of entries supported by the ATM cell header. Preferably, a cell includes a VCI field having a value and a VPI field having a value. The table lookup mechanism preferably includes a first table which produces a first signal based on the value of the VPI field and a second level table which produces a second signal based on the value of the VCI field. The first and second signals are used to route the cell from an input port to a desired destination. Additionally, there is a method for dispatching an ATM cell. The method comprises the steps of locating a table entry in a first level table corresponding to a value of a VPI field of the cell. Then there is the step of producing a first signal corresponding to the table entry. Next, there is the step of locating a connection entry in a second level table corresponding to a value of a VCI field of the cell and the first signal. Then there is the step of producing a second signal corresponding to the connection entry. Next there is the step of directing a cell to a desired destination corresponding to the second signal. Preferably, the step of producing the first signal include the step of producing the first signal corresponding to a value of a INDEX field of the table entry. Preferably, the step of producing the second signal includes the step of producing the second signal corresponding to a value of a CONNECTION INFORMATION field of the connection entry.

Claims

1. A method for dispatching an ATM cell in an ATM network comprising the steps of:

producing a first signal corresponding to a value of a VPI field of the cell;

producing a second signal corresponding to a value of a VCI field of the cell; and

directing the cell to a desired destination in the ATM network corresponding to the first signal and to the second signal.

2. A method as described in claim 1 wherein the step of producing the first signal includes the steps of locating a table entry in a first level table corresponding to a value of a VPI field of the cell and producing a first signal corresponding to the table entry, and the step of producing the second signal includes the steps of locating a connection entry in a second level table corresponding to a value of a VCI field of the cell and the first signal and producing a second signal corresponding to a value of a VCI field of the cell and the first signal.

3. A method as described in claim 2 wherein the locating a table entry step includes the step of determining whether there is a corresponding table entry for the VPI value of the cell in the first level table;

and producing an error signal if there is no corresponding table entry for the cell.

4. A method as described in claim 3 wherein the step of producing the first signal includes the step of producing the first signal corresponding to a value of an INDEX field of the table entry.

5. A method as described in claim 4 wherein the step of producing the second signal includes the step of producing the second signal corresponding to a value of a CONNECTION INFORMATION field of the connection entry.

6. A method as described in claim 5 including after the step of locating the table entry, the step of determining whether the VCI value is within a range of allowable values, and producing the error signal if the VCI value is not within a range of allowable values.

7. A method as described in claim 6 wherein the locating a connection entry step includes the steps of determining whether there is an active connection entry corresponding to the value of the VCI value and the INDEX value;

and producing the error signal if there is no active connection entry.

8. A method as described in claim 7 including after the step of producing the error signal, the step of discarding the cell.

9. A method as described in claim 8 including after the step of locating the table entry, the step of determining whether the cell is provided to a terminating connection or a non-terminating connection.

10. A method as described in claim 9 including after the step of determining whether the cell is provided to a terminating or non-terminating connection, the step of translating the VPI and VCI values of the cell to a new VPI value and a new VCI value if the cell is provided to the terminating connection.

11. A method as described in claim 10 wherein the step of determining whether the VCI value is within an allowable range includes the step of checking whether the VCI value is between a LOW BOUND value of a LOW BOUND field and a HIGH BOUND value of a HIGH BOUND field of the table entry.

12. A method as described in claim 11 wherein the step of determining whether there is a corresponding table entry includes the step of determining whether a value of a VALID field is present in the first table.

13. A method as described in claim 12 wherein the step of determining whether there is an active connection entry includes the step of determining whether a value of a VALID field in the connection entry is present in the second level table.

14. A method as described in claim 13 wherein the step of producing a second signal includes the step of producing the second signal corresponding to a value of a ROUTE field of the connection entry.

15. An ATM cell interface for dispatching ATM cells, each ATM cell having a header with a VPI field having a value and a VCI field having a value, comprising:

L input ports through which ATM cells enter the interface, where L≧

1 and is an integer;

P output ports through which ATM cells exit the interface, where P≧

1 and is an integer; and

means or mechanism that directs the ATM cells from an input port of the L input ports to any desired destinations through at least one output port of the P output ports, said means or mechanism having entries which identify desired destinations for corresponding ATM cells, the number of possible entries in the means or mechanism being less than a total number of entries supported by the ATM cell header, said means or mechanism producing a first signal based on the value of the VPI field and a second signal based on the value of the VCI field for each of the ATM cells which are used to route each of the ATM cells from an input port to a desired destination through at least one output port of the P output ports.

16. An ATM cell interface as described in claim 15 wherein the means or mechanism that directs the ATM cells includes a table lookup means or mechanism.

17. An ATM cell interface as described in claim 16 wherein the table lookup means or mechanism includes a first level table which produces the first signal based on the value of the VPI field and a second level table which produces the second signal based on the value of the VCI field for each of the ATM cells, said first and second signals being used to route each of the ATM cells from an input port of the L input ports to the desired destinations through at least one output port of the P output ports.

18. An ATM cell interface as described in claim 17 wherein the first level table has N table entries, where N≧

1, and wherein the second level table entry has M connection entries where M≧

1 and is an integer.

19. An ATM cell interface as described in claim 18 wherein each first level table entry has a VALID field which indicates whether the VPI field of a cell is defined in the first level table, and each first level table entry has an INDEX field the value of which is used to identify a corresponding connection entry in the second level table.

20. An ATM cell interface as described in claim 19 wherein the first level table entry includes a VCI INFORMATION FIELD a value of which identifies whether the VCI value of the cell is supported in the second level table.

21. An ATM cell interface as described in claim 20 wherein the INFORMATION FIELD includes a low bound field having a value and a high bound field having a value, the values of each of the low bound and high bound field define a range of acceptable VCI values for a given VPI value.

22. An ATM cell interface as described in claim 21 wherein each connection entry has a VCI VALID field having a value which indicates whether a corresponding connection between an input port and one of the any destinations through at least one input port of the P output ports is realizable, and a CONNECTION INFORMATION field having information about how to form a connection between an input port of the L input ports and a desired destination through at least one output port of the P output ports to direct the cell along a desired path.

23. An ATM cell interface as described in claim 22 wherein each first table entry also has a PFLAG field having a value of which indicates whether an ATM cell that is to be routed from an input port of the L input ports to a desired one of the any destinations through at least one output port of the P output ports travels along a terminating or nonterminating connection.

24. An ATM cell interface as described in claim 23 wherein each CONNECTION INFORMATION field includes a ROUTE field value of which is used to direct the cell.

25. An ATM cell interface as described in claim 24 wherein each CONNECTION INFORMATION field includes a new VPI field and a new VCI field, a value of the new VPI field and the new VCI field can be used to translate the VPI value and VCI value of the cell, respectively.

26. An ATM cell interface for dispatching ATM cells, each ATM cell having a header with a VPI field having a value and a VCI field having a value, comprising:

L input ports through which ATM cells enter the interface, where L≧

1 and is an integer;

P output ports through which ATM cells exit the interface, where P≧

1 and is an integer; and

means or a mechanism that directs the ATM cells from an input port of the L input ports to any desired destinations through at least one desired output port of the P output ports, said mechanism having entries which identify desired destinations for corresponding ATM cells, the number of possible entries in the means or mechanism being less than a total number of entries supported by the ATM cell header, said means or mechanism identifying whether the desired destination is reached by the cell along a terminating or a nonterminating path.

27. An ATM cell interface as described in claim 26 wherein the means or mechanism that directs the ATM cells includes a table lookup means or mechanism.

28. An ATM cell interface for dispatching ATM cells, each ATM cell having a header comprising:

L input ports through which ATM cells enter the interface, where L≧

1 and is an integer;

P output ports through which ATM cells exit the interface, where P≧

1 and is an integer; and

means or a mechanism that directs the ATM cells from an input port of the L input ports to any desired destinations through at least one desired output port of the P output ports, said means or mechanism having entries which identify desired destinations for corresponding ATM cells, the number of possible entries in the means or mechanism being less than a total number of entries supported by the ATM cell header, said means or mechanism supporting any combination of VPI and VCI values without bit stripping the cell.

29. An ATM cell interface as described in claim 28 wherein the means or mechanism that directs the ATM cells includes a table lookup means or mechanism.