Power on reset circuit with accurate detection at low voltages
First Claim
Patent Images
1. A power ON reset circuit comprising:
- a first supply-voltage detector for outputting a predetermined pulse signal upon power on;
means for outputting a given pulse signal only when a logical level of said predetermined pulse signal changes;
a second supply-voltage detector for outputting a reference signal when triggered by said given pulse signal, a minimum operational voltage of said first supply-voltage detector, which is the minimum supply voltage at which said first supply-voltage detection is operable, being set lower than the minimum operational voltage of said second supply-voltage detector, which is the minimum supply voltage at which said second supply-voltage detector is operable, a detection voltage of said first supply-voltage detector being set higher than said minimum operational voltage of said second supply-voltage detector; and
means responsive to said predetermined pulse signal and said reference signal for outputting the signal from said power ON reset circuit.
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Abstract
A supply-voltage detector having a low minimum operational voltage while having a large variation is combined with a supply-voltage detector having a high detection precision while having a high minimum operational voltage, so that the supply voltage is detected at a high accuracy without malfunctioning even on a low voltage. A system, such as a microcomputer, could then be reset when the detected supply voltage falls below a certain value. This combined circuit will improve the accuracy of detecting this supply voltage.
56 Citations
5 Claims
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1. A power ON reset circuit comprising:
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a first supply-voltage detector for outputting a predetermined pulse signal upon power on; means for outputting a given pulse signal only when a logical level of said predetermined pulse signal changes; a second supply-voltage detector for outputting a reference signal when triggered by said given pulse signal, a minimum operational voltage of said first supply-voltage detector, which is the minimum supply voltage at which said first supply-voltage detection is operable, being set lower than the minimum operational voltage of said second supply-voltage detector, which is the minimum supply voltage at which said second supply-voltage detector is operable, a detection voltage of said first supply-voltage detector being set higher than said minimum operational voltage of said second supply-voltage detector; and
means responsive to said predetermined pulse signal and said reference signal for outputting the signal from said power ON reset circuit.
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2. A power ON reset circuit comprising:
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a first supply-voltage detector for outputting a predetermined pulse signal upon power on; means for outputting a given pulse signal only when a logical level of said predetermined pulse signal changes; a second supply-voltage detector for outputting a reference signal when triggered by said given pulse signal, a minimum operational voltage of said first supply-voltage detector, which is the minimum supply voltage at which said first supply-voltage detection is operable, being set lower than the minimum operational voltage of said second supply-voltage detector, which is the minimum supply voltage at which said second supply-voltage detector is operable, a detection voltage of said first supply-voltage detector being set higher than said minimum operational voltage of said second supply-voltage detector; and an OR gate having an output of said reference signal from said second supply-voltage detector and said predetermined pulse signal from said first supply-voltage detector as inputs, an output of said OR gate being an output signal of said power ON reset circuit. - View Dependent Claims (4, 5)
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3. A power ON reset circuit comprising:
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a first supply-voltage detector for outputting a predetermined pulse signal upon power on; means for outputting a given pulse signal only when a logical level of said predetermined pulse signal changes; a second supply-voltage detector for outputting a reference signal when triggered by said given pulse signal, a minimum operational voltage of said first supply-voltage detector, which is the minimum supply voltage at which said first supply-voltage detection is operable, being set lower than the minimum operational voltage of said second supply-voltage detector, which is the minimum supply voltage at which said second supply-voltage detector is operable, a detection voltage of said first supply-voltage detector being set higher than said minimum operational voltage of said second supply-voltage detector; said means for outputting a given pulse signal comprises a first delay circuit for delaying the output of said first supply-voltage detector; and an EXOR gate having outputs of said first supply-voltage detector and said delay circuit as inputs, an output of said EXOR gate being input to said second supply-voltage detector as said given pulse signal.
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Specification