Simultaneous capacitive open-circuit testing

• US 5,486,753 A
• Filed: 09/08/1994
• Issued: 01/23/1996
• Est. Priority Date: 07/30/1993
• Status: Expired due to Term

• Current Assignee: Teradyne Incorporated
• Original Assignee: Genrad Incorporated (Teradyne Incorporated)
• Inventors: Mastrocola, Aldo, Khazam, Moses
• Primary Examiner(s): Regan, Maura K.
• Application Number:
  US08/302,227
• Time in Patent Office: 502 Days
• Field of Search: 324/520, 324/537, 324/522, 324/72.5, 324/72, 324/750, 324/456, 324/681, 324/519, 324/529, 324/530, 324/66
• US Class Current: 324/72.5
• CPC Class Codes: G01R 31/312 by capacitive methods

Abstract

To test for proper connections of integrated-circuit connection pins (22) on a circuit board (12) to the conductive paths to which they should be connected, a tester (10) applies signals of different frequencies to paths to be connected to different IC pins provided by the same integrated-circuit package (24). The resultant composite electric-field signal in the vicinity of the integrated-circuit package (24) is coupled to a capacitive probe (42), and the probe signal is subjected to frequency analysis (58-1, 58-2 , . . . 58-J) to determine whether the applied frequency components are present in the signal with sufficient magnitudes. If the magnitude in the sensed signal of an applied frequency component is not great enough, the tester generates an indication that the corresponding IC pin has not been properly connected.

Claims

1. For testing, on a circuit board on which is mounted a circuit package that houses an integrated circuit and provides IC pins intended to be conductively connected to conductive paths respectively associated therewith on the circuit board, the continuity between a plurality of the IC pins and the conductive board paths respectively associated therewith, a method comprising the steps of:

A) applying an AC signal of a different test frequency respectively associated therewith to each of a plurality of the board paths associated with the IC pins;

B) capacitively sensing the resultant electric-field signal in the vicinity of the circuit package;

C) determining the contribution of each of the test frequencies to the sensed signal; and

D) if the contribution of a given test frequency is less than a predetermined threshold associated therewith, generating an indication of a lack of continuity between the board path associated with the given test frequency and the IC pin associated with that board path.

2. For testing, on a circuit board on which are mounted a plurality of circuit packages, each of which houses an integrated circuit and provides a respective IC pin intended to be conductively connected to a conductive path respectively associated therewith on the circuit board and conductively coupled to the conductive path associated with the IC pin provided by each other circuit package, the continuity between the IC pins and the conductive board paths respectively associated therewith, a method comprising the steps of:

A) generating in the vicinity of each of a plurality of the circuit packages an AC electric-field signal of a different test frequency respectively associated therewith;

B) conductively sensing the resultant signal on the board paths conductively connected together;

C) determining the contribution of each of the test frequencies to the sensed signal; and

D) if the contribution of a given test frequency is less than a predetermined threshold associated therewith, generating an indication of a lack of continuity between the board path associated with the given test frequency and the IC pin provided by the circuit package associated with that test frequency.